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authorJosh Blum <josh@joshknows.com>2011-09-28 13:27:33 -0700
committerJosh Blum <josh@joshknows.com>2011-09-28 13:27:33 -0700
commit4226748ddda610eafaf5c6c32be206c336232b80 (patch)
tree93795f42993ba85ffe4b1d4b539bc72eccd638d5 /fpga/usrp2/top/B100/B100.ucf
parentc2122833e25ffe6e8e6918874afe7a3c9a92bc87 (diff)
parent24b07e1b0dbe8ab9d72c46f65c14c34e84347554 (diff)
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Merge branch 'fpga_master' into uhd_master
Conflicts: fpga/usrp1/toplevel/usrp_std/usrp_std.v
Diffstat (limited to 'fpga/usrp2/top/B100/B100.ucf')
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diff --git a/fpga/usrp2/top/B100/B100.ucf b/fpga/usrp2/top/B100/B100.ucf
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+## Main Clock
+NET "CLK_FPGA_P" LOC = "R7" ;
+NET "CLK_FPGA_N" LOC = "T7" ;
+
+## I2C
+NET "SDA_FPGA" LOC = "T13" ;
+NET "SCL_FPGA" LOC = "R13" ;
+
+## CGEN
+NET "cgen_st_ld" LOC = "M13" ;
+NET "cgen_st_refmon" LOC = "J14" ;
+NET "cgen_st_status" LOC = "P6" ;
+NET "cgen_ref_sel" LOC = "T2" ;
+NET "cgen_sync_b" LOC = "H15" ;
+
+## FPGA Config
+#NET "fpga_cfg_din" LOC = "T14" ;
+#NET "fpga_cfg_cclk" LOC = "R14" ;
+#NET "fpga_cfg_init_b" LOC = "T12" ;
+
+## MISC
+#NET "mystery_bus<1>" LOC = "C4" ;
+#NET "mystery_bus<0>" LOC = "E7" ;
+NET "reset_n" LOC = "D5" ;
+NET "PPS_IN" LOC = "M14" ;
+NET "reset_codec" LOC = "B14" ;
+
+## GPIF
+NET "GPIF_D<15>" LOC = "P7" ;
+NET "GPIF_D<14>" LOC = "N8" ;
+NET "GPIF_D<13>" LOC = "T5" ;
+NET "GPIF_D<12>" LOC = "T6" ;
+NET "GPIF_D<11>" LOC = "N6" ;
+NET "GPIF_D<10>" LOC = "P5" ;
+NET "GPIF_D<9>" LOC = "R3" ;
+NET "GPIF_D<8>" LOC = "T3" ;
+NET "GPIF_D<7>" LOC = "N12" ;
+NET "GPIF_D<6>" LOC = "P13" ;
+NET "GPIF_D<5>" LOC = "P11" ;
+NET "GPIF_D<4>" LOC = "R9" ;
+NET "GPIF_D<3>" LOC = "T9" ;
+NET "GPIF_D<2>" LOC = "N9" ;
+NET "GPIF_D<1>" LOC = "P9" ;
+NET "GPIF_D<0>" LOC = "P8" ;
+
+NET "GPIF_CTL<3>" LOC = "N5" ;
+NET "GPIF_CTL<2>" LOC = "M11" ;
+NET "GPIF_CTL<1>" LOC = "M9" ;
+NET "GPIF_CTL<0>" LOC = "M7" ;
+
+NET "GPIF_RDY<3>" LOC = "N11" ;
+NET "GPIF_RDY<2>" LOC = "T10" ;
+NET "GPIF_RDY<1>" LOC = "T4" ;
+NET "GPIF_RDY<0>" LOC = "R5" ;
+
+NET "GPIF_CS" LOC = "P12" ;
+NET "GPIF_SLOE" LOC = "R11" ;
+NET "GPIF_PKTEND" LOC = "P10" ;
+NET "GPIF_ADR<0>" LOC = "T11" ;
+NET "GPIF_ADR<1>" LOC = "H16" ;
+
+NET "IFCLK" LOC = "T8" ;
+
+## LEDs
+NET "debug_led<2>" LOC = "R2" ;
+NET "debug_led<1>" LOC = "N4" ;
+NET "debug_led<0>" LOC = "P4" ;
+
+## Debug bus
+NET "debug_clk<0>" LOC = "K15" ;
+NET "debug_clk<1>" LOC = "K14" ;
+NET "debug<0>" LOC = "K16" ;
+NET "debug<1>" LOC = "J16" ;
+NET "debug<2>" LOC = "C16" ;
+NET "debug<3>" LOC = "C15" ;
+NET "debug<4>" LOC = "E13" ;
+NET "debug<5>" LOC = "D14" ;
+NET "debug<6>" LOC = "D16" ;
+NET "debug<7>" LOC = "D15" ;
+NET "debug<8>" LOC = "E14" ;
+NET "debug<9>" LOC = "F13" ;
+NET "debug<10>" LOC = "G13" ;
+NET "debug<11>" LOC = "F14" ;
+NET "debug<12>" LOC = "E16" ;
+NET "debug<13>" LOC = "F15" ;
+NET "debug<14>" LOC = "H13" ;
+NET "debug<15>" LOC = "G14" ;
+NET "debug<16>" LOC = "G16" ;
+NET "debug<17>" LOC = "F16" ;
+NET "debug<18>" LOC = "J12" ;
+NET "debug<19>" LOC = "J13" ;
+NET "debug<20>" LOC = "L14" ;
+NET "debug<21>" LOC = "L16" ;
+NET "debug<22>" LOC = "M15" ;
+NET "debug<23>" LOC = "M16" ;
+NET "debug<24>" LOC = "L13" ;
+NET "debug<25>" LOC = "K13" ;
+NET "debug<26>" LOC = "P16" ;
+NET "debug<27>" LOC = "N16" ;
+NET "debug<28>" LOC = "R15" ;
+NET "debug<29>" LOC = "P15" ;
+NET "debug<30>" LOC = "N13" ;
+NET "debug<31>" LOC = "N14" ;
+
+## ADC
+NET "adc<11>" LOC = "B15" ;
+NET "adc<10>" LOC = "A8" ;
+NET "adc<9>" LOC = "B8" ;
+NET "adc<8>" LOC = "C8" ;
+NET "adc<7>" LOC = "D8" ;
+NET "adc<6>" LOC = "C9" ;
+NET "adc<5>" LOC = "A9" ;
+NET "adc<4>" LOC = "C10" ;
+NET "adc<3>" LOC = "D9" ;
+NET "adc<2>" LOC = "A3" ;
+NET "adc<1>" LOC = "B3" ;
+NET "adc<0>" LOC = "A4" ;
+NET "RXSYNC" LOC = "D10" ;
+
+## DAC
+NET "TXBLANK" LOC = "K1" ;
+NET "TXSYNC" LOC = "J2" ;
+NET "dac<0>" LOC = "J1" ;
+NET "dac<1>" LOC = "H3" ;
+NET "dac<2>" LOC = "J3" ;
+NET "dac<3>" LOC = "G2" ;
+NET "dac<4>" LOC = "H1" ;
+NET "dac<5>" LOC = "N3" ;
+NET "dac<6>" LOC = "M4" ;
+NET "dac<7>" LOC = "R1" ;
+NET "dac<8>" LOC = "P2" ;
+NET "dac<9>" LOC = "P1" ;
+NET "dac<10>" LOC = "M1" ;
+NET "dac<11>" LOC = "N1" ;
+NET "dac<12>" LOC = "M3" ;
+NET "dac<13>" LOC = "L4" ;
+
+## TX DB
+NET "io_tx<0>" LOC = "K4" ;
+NET "io_tx<1>" LOC = "L3" ;
+NET "io_tx<2>" LOC = "L2" ;
+NET "io_tx<3>" LOC = "F1" ;
+NET "io_tx<4>" LOC = "F3" ;
+NET "io_tx<5>" LOC = "G3" ;
+NET "io_tx<6>" LOC = "E3" ;
+NET "io_tx<7>" LOC = "E2" ;
+NET "io_tx<8>" LOC = "E4" ;
+NET "io_tx<9>" LOC = "F4" ;
+NET "io_tx<10>" LOC = "D1" ;
+NET "io_tx<11>" LOC = "E1" ;
+NET "io_tx<12>" LOC = "D4" ;
+NET "io_tx<13>" LOC = "D3" ;
+NET "io_tx<14>" LOC = "C2" ;
+NET "io_tx<15>" LOC = "C1" ;
+
+## RX DB
+NET "io_rx<0>" LOC = "D7" ;
+NET "io_rx<1>" LOC = "C6" ;
+NET "io_rx<2>" LOC = "A6" ;
+NET "io_rx<3>" LOC = "B6" ;
+NET "io_rx<4>" LOC = "E9" ;
+NET "io_rx<5>" LOC = "A7" ;
+NET "io_rx<6>" LOC = "C7" ;
+NET "io_rx<7>" LOC = "B10" ;
+NET "io_rx<8>" LOC = "A10" ;
+NET "io_rx<9>" LOC = "C11" ;
+NET "io_rx<10>" LOC = "A11" ;
+NET "io_rx<11>" LOC = "D11" ;
+NET "io_rx<12>" LOC = "B12" ;
+NET "io_rx<13>" LOC = "A12" ;
+NET "io_rx<14>" LOC = "A14" ;
+NET "io_rx<15>" LOC = "A13" ;
+
+## SPI
+#NET "SEN_AUX" LOC = "C12" ;
+#NET "SCLK_AUX" LOC = "D12" ;
+#NET "MISO_AUX" LOC = "J5" ;
+NET "SCLK_CODEC" LOC = "K3" ;
+NET "SEN_CODEC" LOC = "D13" ;
+NET "MOSI_CODEC" LOC = "C13" ;
+NET "MISO_CODEC" LOC = "G4" ;
+
+NET "MISO_RX_DB" LOC = "E6" ;
+NET "SEN_RX_DB" LOC = "B4" ;
+NET "MOSI_RX_DB" LOC = "A5" ;
+NET "SCLK_RX_DB" LOC = "C5" ;
+
+NET "MISO_TX_DB" LOC = "J4" ;
+NET "SEN_TX_DB" LOC = "N2" ;
+NET "MOSI_TX_DB" LOC = "L1" ;
+NET "SCLK_TX_DB" LOC = "G1" ;
+
+## Dedicated pins
+#NET "TMS" LOC = "B2" ;
+#NET "TDO" LOC = "B16" ;
+#NET "TDI" LOC = "B1" ;
+#NET "TCK" LOC = "A15" ;
+
+#NET "fpga_cfg_prog_b" LOC = "A2" ;
+#NET "fpga_cfg_done" LOC = "T15" ;