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| author | Philip Balister <philip@opensdr.com> | 2010-08-28 19:54:03 -0400 |
|---|---|---|
| committer | Philip Balister <philip@opensdr.com> | 2010-08-28 19:54:03 -0400 |
| commit | ee44eecc3e2047b1514794add99203c4d2d3c7cc (patch) | |
| tree | a2819221ce2c70a9792bf550bf252d05ccb50b91 /fpga/usrp2/timing | |
| parent | a79d320d7691fea82c9194d59a5d4dc7bbb40317 (diff) | |
| download | uhd-ee44eecc3e2047b1514794add99203c4d2d3c7cc.tar.gz uhd-ee44eecc3e2047b1514794add99203c4d2d3c7cc.tar.bz2 uhd-ee44eecc3e2047b1514794add99203c4d2d3c7cc.zip | |
Test if usrp_e kernel module is loaded before trying to load the FPGA. Do
not load the the fpga if the kernel module is loaded.
Diffstat (limited to 'fpga/usrp2/timing')
0 files changed, 0 insertions, 0 deletions