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| author | Josh Blum <josh@joshknows.com> | 2010-10-14 16:51:47 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-10-14 16:51:47 -0700 |
| commit | 71e1763332141603e9edba097fd19b00e9a76ab8 (patch) | |
| tree | 9d216251fc58d2e731bb79d26aefa29480c9b2ac /fpga/usrp2/timing | |
| parent | 4582a2deb385c0a4849f5d20c44a5469779bcbb2 (diff) | |
| download | uhd-71e1763332141603e9edba097fd19b00e9a76ab8.tar.gz uhd-71e1763332141603e9edba097fd19b00e9a76ab8.tar.bz2 uhd-71e1763332141603e9edba097fd19b00e9a76ab8.zip | |
uhd: removed 1 sample buffers in test async messages
made a hack in the vrt handler to bump 0 sample requests up to 1 sample (until the hardware supports it)
Diffstat (limited to 'fpga/usrp2/timing')
0 files changed, 0 insertions, 0 deletions