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| author | Josh Blum <josh@joshknows.com> | 2012-02-18 16:46:56 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-02-18 16:46:56 -0800 |
| commit | 026f57d204efc03a421602eb40b572dd9c2d0d2f (patch) | |
| tree | 62e6e3426eb0c8f28e8be785342b6f30738c97d0 /fpga/usrp2/models | |
| parent | 2e37dd87234e5beddd6f76fcda714916f761f812 (diff) | |
| download | uhd-026f57d204efc03a421602eb40b572dd9c2d0d2f.tar.gz uhd-026f57d204efc03a421602eb40b572dd9c2d0d2f.tar.bz2 uhd-026f57d204efc03a421602eb40b572dd9c2d0d2f.zip | |
vita rx: trigger clear after packet tranfer
To avoid blocking conditions down the pipe,
avoid clearing vita rx during packet transfer.
Adds state machine to delay the clear until after xfer completes.
Diffstat (limited to 'fpga/usrp2/models')
0 files changed, 0 insertions, 0 deletions