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authorJosh Blum <josh@joshknows.com>2013-08-16 10:49:03 -0700
committerJosh Blum <josh@joshknows.com>2013-08-16 10:49:03 -0700
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treeb01c521d446e28c4df1054198ea7baa149014bf0 /fpga/usrp2/models/IDDR2.v
parentcacc3fc99468373ff8c576a41dfa6f8f052a68d9 (diff)
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b200: lower clock rate is 5MHz due to DCM
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