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| author | Josh Blum <josh@joshknows.com> | 2011-06-14 17:29:21 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-06-14 17:29:21 -0700 |
| commit | dd157937466f3ee18b08712625eba84582a913f3 (patch) | |
| tree | 6a4eadb148a2c8141032b78d3c521d56c1f34910 /fpga/usrp2/models/CY7C1356C | |
| parent | a1f36ebf436fccbb6cc81bb5f32a790d444772c2 (diff) | |
| parent | c0fadece89314f3a00892122c28caf187ce1a717 (diff) | |
| download | uhd-dd157937466f3ee18b08712625eba84582a913f3.tar.gz uhd-dd157937466f3ee18b08712625eba84582a913f3.tar.bz2 uhd-dd157937466f3ee18b08712625eba84582a913f3.zip | |
Merge branch 'fpga_next' into uhd_next
Diffstat (limited to 'fpga/usrp2/models/CY7C1356C')
| -rw-r--r-- | fpga/usrp2/models/CY7C1356C/cy1356.v | 17 | ||||
| -rw-r--r-- | fpga/usrp2/models/CY7C1356C/testbench.v | 17 |
2 files changed, 34 insertions, 0 deletions
diff --git a/fpga/usrp2/models/CY7C1356C/cy1356.v b/fpga/usrp2/models/CY7C1356C/cy1356.v index 9197eea6d..ab7ace610 100644 --- a/fpga/usrp2/models/CY7C1356C/cy1356.v +++ b/fpga/usrp2/models/CY7C1356C/cy1356.v @@ -1,3 +1,20 @@ +// +// Copyright 2011 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + `define sb200
//************************************************************************
//************************************************************************
diff --git a/fpga/usrp2/models/CY7C1356C/testbench.v b/fpga/usrp2/models/CY7C1356C/testbench.v index 5dde89e6c..01e0cbe00 100644 --- a/fpga/usrp2/models/CY7C1356C/testbench.v +++ b/fpga/usrp2/models/CY7C1356C/testbench.v @@ -1,3 +1,20 @@ +// +// Copyright 2011 Ettus Research LLC +// +// This program is free software: you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation, either version 3 of the License, or +// (at your option) any later version. +// +// This program is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see <http://www.gnu.org/licenses/>. +// + `timescale 1ns / 10ps
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