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| author | Jason Abele <jason@ettus.com> | 2011-02-28 12:59:54 -0800 |
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| committer | Jason Abele <jason@ettus.com> | 2011-02-28 12:59:54 -0800 |
| commit | bec619cd7469dca002ff493d60f99e18df7b0a3a (patch) | |
| tree | 613c0f90bffbbfbd0e78735ad9af48758077d91d /fpga/usrp2/models/CY7C1356C | |
| parent | 50a9d77e93c9dc627cd80e30759d58751d128fcb (diff) | |
| download | uhd-bec619cd7469dca002ff493d60f99e18df7b0a3a.tar.gz uhd-bec619cd7469dca002ff493d60f99e18df7b0a3a.tar.bz2 uhd-bec619cd7469dca002ff493d60f99e18df7b0a3a.zip | |
Hopefully the last typo in external clock mod for usrp1
Diffstat (limited to 'fpga/usrp2/models/CY7C1356C')
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