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authorJosh Blum <josh@joshknows.com>2012-07-02 13:53:11 -0700
committerJosh Blum <josh@joshknows.com>2012-07-02 14:06:00 -0700
commitde4d2fca9030cda04de1457abe8cba6a70ba0b95 (patch)
treeb345ad9e166d807994cac3e5bb787ee90dc7f487 /fpga/usrp2/gpif
parent2684652511036a901e22fe936953abfa8327469e (diff)
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usrp: added fifo_ctrl_excelsior for FIFO control + async msgs
The fifo_ctrl_excelsior is the host code for dealing with E100/B100 control messages and async messages. It also has the SPI implementation. Timed commands are implemented on top of this code.
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