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| author | Josh Blum <josh@joshknows.com> | 2011-07-08 12:17:54 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-07-08 12:17:54 -0700 |
| commit | 17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9 (patch) | |
| tree | e2d0d39d6b44b72c759b8be1380b2024de50bdf6 /fpga/usrp2/fifo | |
| parent | 60933a242cce0b1ec45e9f948e3da9ab72b2fd90 (diff) | |
| parent | 4ea6f7431e09d9f27ecaa1c1b187d2c2f613e8f4 (diff) | |
| download | uhd-17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9.tar.gz uhd-17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9.tar.bz2 uhd-17fabccfe4be79f3a5a0a3d7ab14ea72a791ecd9.zip | |
Merge branch 'fpga_next' into next
Diffstat (limited to 'fpga/usrp2/fifo')
| -rw-r--r-- | fpga/usrp2/fifo/fifo_2clock.v | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/fpga/usrp2/fifo/fifo_2clock.v b/fpga/usrp2/fifo/fifo_2clock.v index 756ad508f..c6aaf34dc 100644 --- a/fpga/usrp2/fifo/fifo_2clock.v +++ b/fpga/usrp2/fifo/fifo_2clock.v @@ -65,6 +65,11 @@ module fifo_2clock (.rst(arst), .wr_clk(wclk),.din({1'b0,datain}),.full(full),.wr_en(write),.wr_data_count(level_wclk), .rd_clk(rclk),.dout({dummy,dataout}),.empty(empty),.rd_en(read),.rd_data_count(level_rclk) ); + else if ((WIDTH==18) & (SIZE==10)) + fifo_xlnx_1Kx18_2clk fifo_xlnx_1Kx18_2clk + (.rst(arst), + .wr_clk(wclk),.din(datain),.full(full),.wr_en(write),.wr_data_count(level_wclk), + .rd_clk(rclk),.dout(dataout),.empty(empty),.rd_en(read),.rd_data_count(level_rclk) ); endgenerate assign occupied = {{(16-SIZE-1){1'b0}},level_rclk}; |