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| author | Josh Blum <josh@joshknows.com> | 2012-04-09 14:28:25 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-04-09 14:30:16 -0700 |
| commit | 00c241844a62c22cac538316d507c524acc1c393 (patch) | |
| tree | 710299bd0b928b5cf1471b84e9c7d42fa8ca8bcf /fpga/usrp2/fifo/valve36.v | |
| parent | c8a2e4881f06212be7e10227220ebac33987143b (diff) | |
| download | uhd-00c241844a62c22cac538316d507c524acc1c393.tar.gz uhd-00c241844a62c22cac538316d507c524acc1c393.tar.bz2 uhd-00c241844a62c22cac538316d507c524acc1c393.zip | |
dsp: clear register now overlaps with numchan register.
This fixes the bug of unwanted clearing when setting format.
Diffstat (limited to 'fpga/usrp2/fifo/valve36.v')
0 files changed, 0 insertions, 0 deletions