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author | Josh Blum <josh@joshknows.com> | 2011-05-17 15:12:02 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-05-17 15:12:02 -0700 |
commit | 9065043544dd129e16d7bb30ae8cb8d5562c3326 (patch) | |
tree | 53f6abdc8a4c1b306e4e0d5e7970e68113ca3374 /fpga/usrp2/fifo/valve36.v | |
parent | 22097e81dc54c895ed411c74c1829721e3a1ce5e (diff) | |
download | uhd-9065043544dd129e16d7bb30ae8cb8d5562c3326.tar.gz uhd-9065043544dd129e16d7bb30ae8cb8d5562c3326.tar.bz2 uhd-9065043544dd129e16d7bb30ae8cb8d5562c3326.zip |
usrp2: moved register map into #defines, entries for new dsp frontend
also fixes irq rb
Diffstat (limited to 'fpga/usrp2/fifo/valve36.v')
0 files changed, 0 insertions, 0 deletions