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authorJosh Blum <josh@joshknows.com>2011-01-19 17:45:08 -0800
committerJosh Blum <josh@joshknows.com>2011-01-19 17:45:08 -0800
commit72daf0902c8b8e404774a4e2d2657edf95be5e87 (patch)
tree0fa7de137a969b838f235dff9a30d8c64a67fdcc /fpga/usrp2/fifo/packet_router.v
parent8e0fbbe47b3c0b2805d2a638da7f363bee2240fd (diff)
parent1254656ef914482cc111ffa3aca48be5c1e8caaf (diff)
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Merge branch 'fpga_next' into uhd_with_fpga_next
Diffstat (limited to 'fpga/usrp2/fifo/packet_router.v')
-rw-r--r--fpga/usrp2/fifo/packet_router.v5
1 files changed, 2 insertions, 3 deletions
diff --git a/fpga/usrp2/fifo/packet_router.v b/fpga/usrp2/fifo/packet_router.v
index ff1f80927..161b59016 100644
--- a/fpga/usrp2/fifo/packet_router.v
+++ b/fpga/usrp2/fifo/packet_router.v
@@ -68,11 +68,10 @@ module packet_router
//setting register for mode control
wire [31:0] _sreg_mode_ctrl;
- wire master_mode_flag = _sreg_mode_ctrl[0];
- setting_reg #(.my_addr(CTRL_BASE+0)) sreg_mode_ctrl(
+ setting_reg #(.my_addr(CTRL_BASE+0), .width(1)) sreg_mode_ctrl(
.clk(stream_clk),.rst(stream_rst),
.strobe(set_stb),.addr(set_addr),.in(set_data),
- .out(_sreg_mode_ctrl),.changed()
+ .out(master_mode_flag),.changed()
);
//setting register to program the IP address