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| author | Josh Blum <josh@joshknows.com> | 2011-03-17 13:53:48 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-03-17 13:53:48 -0700 |
| commit | ee424d797fc37a8c3c2a82a58218bf1e85456226 (patch) | |
| tree | 74b179d55122df0a156f82ef25dd42895bb52487 /fpga/usrp2/control_lib | |
| parent | b52877b3d9af48ecde6f5378755e8c2337a41921 (diff) | |
| parent | be2c1b95c1d6f4ad2ea663bb926a04463edb9358 (diff) | |
| download | uhd-ee424d797fc37a8c3c2a82a58218bf1e85456226.tar.gz uhd-ee424d797fc37a8c3c2a82a58218bf1e85456226.tar.bz2 uhd-ee424d797fc37a8c3c2a82a58218bf1e85456226.zip | |
Merge branch 'fpga_memory_reorg' into usrp2/new_reg_map
Diffstat (limited to 'fpga/usrp2/control_lib')
| -rw-r--r-- | fpga/usrp2/control_lib/ram_harvard.v | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/fpga/usrp2/control_lib/ram_harvard.v b/fpga/usrp2/control_lib/ram_harvard.v index 948f9b36f..a190e20fd 100644 --- a/fpga/usrp2/control_lib/ram_harvard.v +++ b/fpga/usrp2/control_lib/ram_harvard.v @@ -27,9 +27,7 @@ module ram_harvard input dwb_we_i, output dwb_ack_o, input dwb_stb_i, - input [3:0] dwb_sel_i, - - input flush_icache ); + input [3:0] dwb_sel_i ); reg ack_d1; reg stb_d1; |