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| author | Josh Blum <josh@joshknows.com> | 2010-04-15 11:24:24 -0700 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2010-04-15 11:24:24 -0700 |
| commit | 05d77f772317de5d925301aa11bb9a880656dd05 (patch) | |
| tree | 0910bfb9265fab1644a3d3a1706719f1b038d193 /fpga/usrp2/control_lib/mux8.v | |
| parent | 16818dc98e97b69a028c47e66ebfb16e32565533 (diff) | |
| download | uhd-05d77f772317de5d925301aa11bb9a880656dd05.tar.gz uhd-05d77f772317de5d925301aa11bb9a880656dd05.tar.bz2 uhd-05d77f772317de5d925301aa11bb9a880656dd05.zip | |
moved usrp1 and usrp2 fpga dirs into fpga subdirectory
Diffstat (limited to 'fpga/usrp2/control_lib/mux8.v')
| -rw-r--r-- | fpga/usrp2/control_lib/mux8.v | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/fpga/usrp2/control_lib/mux8.v b/fpga/usrp2/control_lib/mux8.v new file mode 100644 index 000000000..9db96a60f --- /dev/null +++ b/fpga/usrp2/control_lib/mux8.v @@ -0,0 +1,21 @@ + + +module mux8 + #(parameter WIDTH=32, parameter DISABLED=0) + (input en, + input [2:0] sel, + input [WIDTH-1:0] i0, + input [WIDTH-1:0] i1, + input [WIDTH-1:0] i2, + input [WIDTH-1:0] i3, + input [WIDTH-1:0] i4, + input [WIDTH-1:0] i5, + input [WIDTH-1:0] i6, + input [WIDTH-1:0] i7, + output [WIDTH-1:0] o); + + assign o = en ? (sel[2] ? (sel[1] ? (sel[0] ? i7 : i6) : (sel[0] ? i5 : i4)) : + (sel[1] ? (sel[0] ? i3 : i2) : (sel[0] ? i1 : i0))) : + DISABLED; + +endmodule // mux8 |