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authorMartin Braun <martin.braun@ettus.com>2014-10-07 11:25:20 +0200
committerMartin Braun <martin.braun@ettus.com>2014-10-07 11:25:20 +0200
commitfd3e84941de463fa1a7ebab0a69515b4bf2614cd (patch)
tree3fa721a13d41d2c0451d663a59a220a38fd5e614 /fpga/usrp1/tb/run_fullchip
parent3b66804e41891e358c790b453a7a59ec7462dba4 (diff)
downloaduhd-fd3e84941de463fa1a7ebab0a69515b4bf2614cd.tar.gz
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Removed copy of FPGA source files.
Diffstat (limited to 'fpga/usrp1/tb/run_fullchip')
-rwxr-xr-xfpga/usrp1/tb/run_fullchip4
1 files changed, 0 insertions, 4 deletions
diff --git a/fpga/usrp1/tb/run_fullchip b/fpga/usrp1/tb/run_fullchip
deleted file mode 100755
index eb81d7ff7..000000000
--- a/fpga/usrp1/tb/run_fullchip
+++ /dev/null
@@ -1,4 +0,0 @@
-#!/bin/sh
-
-iverilog -y ../toplevel/fullchip -y ../sdr_lib -y ../models -y . -o fullchip_tb fullchip_tb.v
-