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author | Martin Braun <martin.braun@ettus.com> | 2014-04-01 15:45:56 +0200 |
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committer | Martin Braun <martin.braun@ettus.com> | 2014-04-10 21:38:14 +0200 |
commit | 7cb3c980f92847f1c03df21f28f6deb1ec827792 (patch) | |
tree | 9c3b0f7969a1d11279c85838e461dedd56fca80f /fpga/usrp1/models/fifo.v | |
parent | 2ca6575ff390caf74702c5f3b92fa5a1e09d5414 (diff) | |
download | uhd-7cb3c980f92847f1c03df21f28f6deb1ec827792.tar.gz uhd-7cb3c980f92847f1c03df21f28f6deb1ec827792.tar.bz2 uhd-7cb3c980f92847f1c03df21f28f6deb1ec827792.zip |
uhd: Fixed bug in cal tools that would always use A-side settings, also some refactoring
Diffstat (limited to 'fpga/usrp1/models/fifo.v')
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