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author | Josh Blum <josh@joshknows.com> | 2013-08-16 10:49:03 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2013-08-16 10:49:03 -0700 |
commit | 9c3fd671810abf0d39d7baa78073b90b95d9b5bc (patch) | |
tree | b01c521d446e28c4df1054198ea7baa149014bf0 /fpga/usrp1/megacells/sub32.cmp | |
parent | cacc3fc99468373ff8c576a41dfa6f8f052a68d9 (diff) | |
download | uhd-9c3fd671810abf0d39d7baa78073b90b95d9b5bc.tar.gz uhd-9c3fd671810abf0d39d7baa78073b90b95d9b5bc.tar.bz2 uhd-9c3fd671810abf0d39d7baa78073b90b95d9b5bc.zip |
b200: lower clock rate is 5MHz due to DCM
Diffstat (limited to 'fpga/usrp1/megacells/sub32.cmp')
0 files changed, 0 insertions, 0 deletions