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author | Josh Blum <josh@joshknows.com> | 2010-04-15 11:24:24 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2010-04-15 11:24:24 -0700 |
commit | 05d77f772317de5d925301aa11bb9a880656dd05 (patch) | |
tree | 0910bfb9265fab1644a3d3a1706719f1b038d193 /fpga/usrp1/megacells/addsub16_inst.v | |
parent | 16818dc98e97b69a028c47e66ebfb16e32565533 (diff) | |
download | uhd-05d77f772317de5d925301aa11bb9a880656dd05.tar.gz uhd-05d77f772317de5d925301aa11bb9a880656dd05.tar.bz2 uhd-05d77f772317de5d925301aa11bb9a880656dd05.zip |
moved usrp1 and usrp2 fpga dirs into fpga subdirectory
Diffstat (limited to 'fpga/usrp1/megacells/addsub16_inst.v')
-rwxr-xr-x | fpga/usrp1/megacells/addsub16_inst.v | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/fpga/usrp1/megacells/addsub16_inst.v b/fpga/usrp1/megacells/addsub16_inst.v new file mode 100755 index 000000000..4a81ff2ee --- /dev/null +++ b/fpga/usrp1/megacells/addsub16_inst.v @@ -0,0 +1,9 @@ +addsub16 addsub16_inst ( + .add_sub ( add_sub_sig ), + .dataa ( dataa_sig ), + .datab ( datab_sig ), + .clock ( clock_sig ), + .aclr ( aclr_sig ), + .clken ( clken_sig ), + .result ( result_sig ) + ); |