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author | Wade Fife <wade.fife@ettus.com> | 2020-09-08 20:04:56 -0500 |
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committer | michael-west <michael.west@ettus.com> | 2020-09-11 00:44:25 -0700 |
commit | 830455fae53e9e63146798ba075460cfa2e6ae3a (patch) | |
tree | a62fcf57efc7fa8852ea4f7fc4c5429b37753889 /fpga/docs/usrp3/simulation.md | |
parent | a25f9306274583513531fb0537372b8bf03625da (diff) | |
download | uhd-830455fae53e9e63146798ba075460cfa2e6ae3a.tar.gz uhd-830455fae53e9e63146798ba075460cfa2e6ae3a.tar.bz2 uhd-830455fae53e9e63146798ba075460cfa2e6ae3a.zip |
fpga: docs: Update user manual for UHD 4.0
Diffstat (limited to 'fpga/docs/usrp3/simulation.md')
-rw-r--r-- | fpga/docs/usrp3/simulation.md | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/fpga/docs/usrp3/simulation.md b/fpga/docs/usrp3/simulation.md index 16afed462..ad0a9ec6d 100644 --- a/fpga/docs/usrp3/simulation.md +++ b/fpga/docs/usrp3/simulation.md @@ -2,10 +2,15 @@ ## Instructions - - \subpage md_usrp3_sim_running_testbenches "Running Testbenches" - - \subpage md_usrp3_sim_writing_testbenches "Writing Testbenches" + - \subpage md_usrp3_sim_running_testbenches "Running a Testbench" + - \subpage md_usrp3_sim_writing_testbenches "Writing a Testbench" ## Library Reference - - \subpage md_usrp3_sim_libs_general "General Purpose" - - \subpage md_usrp3_sim_libs_axi "AXI" + - \subpage md_usrp3_sim_simulation_libraries "Testbench Simulation Libraries" + +## Legacy Library Reference + + - \subpage md_usrp3_sim_legacy_testbenches "Legacy Testbenches" + - \subpage md_usrp3_sim_libs_general "Legacy General Purpose Simulation Libraries" + - \subpage md_usrp3_sim_libs_axi "Legacy AXI Interface Libraries" |