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authormichael-west <michael.west@ettus.com>2022-02-13 17:56:02 -0800
committerAaron Rossetto <aaron.rossetto@ni.com>2022-04-01 13:33:08 -0700
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FPGA: Replay block version 1.1
- Add registers to read current record and play positions. - Add register to read current space in play command FIFO to allow software to avoid overflowing the FIFO. - Cache base address and size with play command in command FIFO. - Fix timestamp logic. Timestamp is only for the first packet of a burst. The increment of 1 for each sample is not accurate because it assumed the Replay block was playing at the same rate as the Radio, which cannot be assumed. Maintained backwards compatibility with older API. Signed-off-by: michael-west <michael.west@ettus.com>
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