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| author | Ashish Chaudhari <ashish@ettus.com> | 2018-02-20 11:42:56 -0800 |
|---|---|---|
| committer | Ashish Chaudhari <ashish.chaudhari@ettus.com> | 2018-02-21 16:50:18 -0800 |
| commit | d5109ae99e5da24707a8d7a6d57b96f6deabbede (patch) | |
| tree | 7f06c5cbb5e820323f083731fac0d2477e04c06c /fpga-src | |
| parent | cf644768c43cc15844e3f1b64f6e363634719f5e (diff) | |
| download | uhd-d5109ae99e5da24707a8d7a6d57b96f6deabbede.tar.gz uhd-d5109ae99e5da24707a8d7a6d57b96f6deabbede.tar.bz2 uhd-d5109ae99e5da24707a8d7a6d57b96f6deabbede.zip | |
rfnoc,x300: Multiple clocking changes
- Moved bus_clk <=> ce_clk crossing to axi_wrapper in FPGA
which resulted in a noc_shell compat bump
- Change x300 bus_clk frequency to 187.5 MHz
Diffstat (limited to 'fpga-src')
| m--------- | fpga-src | 0 |
1 files changed, 0 insertions, 0 deletions
diff --git a/fpga-src b/fpga-src -Subproject 8570a45339bd35ebb445f7c455f1c80a804f7c0 +Subproject 2824f7b94b12bc8152900243830f7afc105d87e |