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| author | michael-west <michael.west@ettus.com> | 2016-08-11 12:28:31 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2016-08-11 13:36:31 -0700 |
| commit | bf6adfaf6f4b391ea74639133a6a00b0ca7fcfa0 (patch) | |
| tree | e1a0e3b39b46a8c3f69cc6976dc0406dc3df92eb /fpga-src | |
| parent | bd73c26568fa4c35d80efa75a640518d03a1e53f (diff) | |
| download | uhd-bf6adfaf6f4b391ea74639133a6a00b0ca7fcfa0.tar.gz uhd-bf6adfaf6f4b391ea74639133a6a00b0ca7fcfa0.tar.bz2 uhd-bf6adfaf6f4b391ea74639133a6a00b0ca7fcfa0.zip | |
WBX: Make v2 and v3 boards lock with 50 MHz ref clock (X300 default)
Diffstat (limited to 'fpga-src')
0 files changed, 0 insertions, 0 deletions