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| author | Martin Braun <martin.braun@ettus.com> | 2017-04-25 17:00:34 -0700 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-12-22 15:03:52 -0800 |
| commit | 151ba5fb06dfdb6fcc46ccfdabf5f1e064236981 (patch) | |
| tree | fa941b0589b09a22957e8b7e3966679748a9b202 /fpga-src | |
| parent | 1262dfb3ccf5a9916685b3399587593174c6583e (diff) | |
| download | uhd-151ba5fb06dfdb6fcc46ccfdabf5f1e064236981.tar.gz uhd-151ba5fb06dfdb6fcc46ccfdabf5f1e064236981.tar.bz2 uhd-151ba5fb06dfdb6fcc46ccfdabf5f1e064236981.zip | |
mpm: Major refactoring
- Created clean interfaces for SPI and registers
- Severed most links to UHD
- Added a lockable class which allows exposing mutexes into Python
Diffstat (limited to 'fpga-src')
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