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| author | Ashish Chaudhari <ashish@ettus.com> | 2015-09-13 00:45:20 -0700 |
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| committer | Ashish Chaudhari <ashish@ettus.com> | 2015-09-16 17:21:52 -0700 |
| commit | ea52a8d8e71aae5cf341b72083575dda3c8f6353 (patch) | |
| tree | 0096e904fdcdf0c9d90c0968a1cb4820dd4f4f1a /fpga-src | |
| parent | 07de40c04b6c2ab3fb6470eaea539a6dbea8884f (diff) | |
| download | uhd-ea52a8d8e71aae5cf341b72083575dda3c8f6353.tar.gz uhd-ea52a8d8e71aae5cf341b72083575dda3c8f6353.tar.bz2 uhd-ea52a8d8e71aae5cf341b72083575dda3c8f6353.zip | |
usrp3: Added AXI DMA FIFO control core
- Can access all registers in axi_dma_fifo.v
Diffstat (limited to 'fpga-src')
0 files changed, 0 insertions, 0 deletions