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| author | Josh Blum <josh@joshknows.com> | 2012-01-24 08:38:36 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2012-01-24 08:38:36 -0800 |
| commit | cbeb4305b59d4b9370bfa7c6f5da7597f9de8045 (patch) | |
| tree | e381a0561473d2971d78d30f7562d88aac3bb0b1 /firmware | |
| parent | d2e4354f7842d7adbdb11367cd8e98af6e463c14 (diff) | |
| download | uhd-cbeb4305b59d4b9370bfa7c6f5da7597f9de8045.tar.gz uhd-cbeb4305b59d4b9370bfa7c6f5da7597f9de8045.tar.bz2 uhd-cbeb4305b59d4b9370bfa7c6f5da7597f9de8045.zip | |
usrp2: same change but to fw updater
Diffstat (limited to 'firmware')
| -rw-r--r-- | firmware/zpu/lib/memory_map.h | 6 | ||||
| -rw-r--r-- | firmware/zpu/usrp2p/udp_fw_update.c | 8 |
2 files changed, 3 insertions, 11 deletions
diff --git a/firmware/zpu/lib/memory_map.h b/firmware/zpu/lib/memory_map.h index 84298d3c1..0076836a9 100644 --- a/firmware/zpu/lib/memory_map.h +++ b/firmware/zpu/lib/memory_map.h @@ -297,11 +297,7 @@ typedef struct { // --- VITA RX CTRL regs --- typedef struct { - // The following 3 are logically a single command register. - // They are clocked into the underlying fifo when time_ticks is written. - volatile uint32_t cmd; // {now, chain, num_samples(30) - volatile uint32_t time_secs; - volatile uint32_t time_ticks; + volatile uint32_t _pad[3]; volatile uint32_t clear; } sr_rx_ctrl_t; diff --git a/firmware/zpu/usrp2p/udp_fw_update.c b/firmware/zpu/usrp2p/udp_fw_update.c index 793011651..5689388a8 100644 --- a/firmware/zpu/usrp2p/udp_fw_update.c +++ b/firmware/zpu/usrp2p/udp_fw_update.c @@ -67,12 +67,8 @@ void handle_udp_fw_update_packet(struct socket_address src, struct socket_addres update_data_out.id = USRP2_FW_UPDATE_ID_OHAI_OMG; memcpy(&update_data_out.data.ip_addr, (void *)get_ip_addr(), sizeof(struct ip_addr)); //this is to stop streaming for the folks who think updating while streaming is a good idea - sr_rx_ctrl0->cmd = 1 << 31 | 1 << 28; //no samples now - sr_rx_ctrl0->time_secs = 0; - sr_rx_ctrl0->time_ticks = 0; //latch the command - sr_rx_ctrl1->cmd = 1 << 31 | 1 << 28; //no samples now - sr_rx_ctrl1->time_secs = 0; - sr_rx_ctrl1->time_ticks = 0; //latch the command + sr_rx_ctrl0->clear = 1; + sr_rx_ctrl1->clear = 1; sr_tx_ctrl->cyc_per_up = 0; break; |