Clock bugs, LED order.

Figured out cold-start problem with Matt's help -- the DCM wasn't being
reset. This also explains why USRP2 didn't like it when
clocks_mimo_config was omitted -- it was sneakily resetting the DCM
while enabling/disabling ref outputs.

Also re-did USRP2P LED order and genericized the LED settings so LED_D
is LED_D for both USRP2 and USRP2P.

6 files changed, 34 insertions, 20 deletions

diff --git a/firmware/microblaze/lib/clocks.c b/firmware/microblaze/lib/clocks.c
index b9bd2e107..2b352a385 100644
--- a/firmware/microblaze/lib/clocks.c
+++ b/firmware/microblaze/lib/clocks.c
@@ -25,7 +25,6 @@
 #include "ad9510.h"
 #include "spi.h"
 #include "u2_init.h"
-#include "nonstdio.h"
 
 //USRP2PLUS clocks:
 //Clock 0: testclk
@@ -46,6 +45,7 @@ clocks_init(void)
   // Set up basic clocking functions in AD9510
   ad9510_write_reg(0x45, 0x01); // CLK2 drives distribution
 
+  //enable the 100MHz clock output to the FPGA for 50MHz CPU clock
   clocks_enable_fpga_clk(true, 1);
 
   spi_wait();
@@ -58,7 +58,14 @@ clocks_init(void)
 //  ad9510_write_reg(0x5A, 0x01); // Update Regs
 
   // Primary clock configuration
-  clocks_mimo_config(MC_WE_DONT_LOCK);
+//  clocks_mimo_config(MC_WE_DONT_LOCK);
+
+
+  //wait for the clock to stabilize
+  while(!clocks_lock_detect());
+
+  //issue a reset to the DCM so it locks up to the new freq
+  output_regs->clk_ctrl |= CLK_RESET;
 
   // Set up other clocks
   //clocks_enable_test_clk(false, 0);
@@ -71,7 +78,7 @@ clocks_init(void)
   //clocks_enable_adc_clk(true, 1);
 }
 
-
+/*
 void
 clocks_mimo_config(int flags)
 {
@@ -99,7 +106,7 @@ clocks_mimo_config(int flags)
   spi_wait();
   
   // Allow for clock switchover
-  
+  // The below masks include 0x10, which issues a reset to the DCM.  
   if (flags & _MC_WE_LOCK){		// WE LOCK
     if (flags & _MC_MIMO_CLK_INPUT) {
       // Turn on ref output and choose the MIMO connector
@@ -121,16 +128,14 @@ clocks_mimo_config(int flags)
 //  else
 //    clocks_enable_clkexp_out(false,0); 
 }
+*/
 
-/*
 bool 
 clocks_lock_detect()
 {
-  if(pic_regs->pending & PIC_CLKSTATUS)
-    return true;
-  return false;
+    return (pic_regs->pending & PIC_CLKSTATUS);
 }
-*/
+
 int inline
 clocks_gen_div(int divisor)
 {
diff --git a/firmware/microblaze/lib/clocks.h b/firmware/microblaze/lib/clocks.h
index 399127595..28d1d542f 100644
--- a/firmware/microblaze/lib/clocks.h
+++ b/firmware/microblaze/lib/clocks.h
@@ -43,12 +43,12 @@ void clocks_init(void);
  * Configure our master clock source, and whether or not we drive a
  * clock onto the mimo connector.  See MC_flags in usrp2_mimo_config.h.
  */
-void clocks_mimo_config(int flags);
+//void clocks_mimo_config(int flags);
 
 /*!
  * \brief Lock Detect -- Return True if our PLL is locked
  */
-//bool clocks_lock_detect();
+bool clocks_lock_detect();
 
 /*!
  * \brief Enable or disable test clock (extra clock signal)
diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c
index ff558d673..75bc40859 100644
--- a/firmware/microblaze/lib/u2_init.c
+++ b/firmware/microblaze/lib/u2_init.c
@@ -26,6 +26,7 @@
 #include "mdelay.h"
 #include "clocks.h"
 #include "usrp2/fw_common.h"
+#include "nonstdio.h"
 
 unsigned char u2_hw_rev_major;
 unsigned char u2_hw_rev_minor;
@@ -66,7 +67,7 @@ u2_init(void)
   mdelay(100);
   hal_set_leds(0x1f, 0x1f);
   mdelay(100);
-  hal_set_leds(0x1, 0x1f);  // Leave the first one on
+  hal_set_leds(LED_D, 0x1f);  // Leave one on
 
 #if 0
   // test register readback
diff --git a/firmware/microblaze/usrp2/memory_map.h b/firmware/microblaze/usrp2/memory_map.h
index 4c9ead615..41a2820bc 100644
--- a/firmware/microblaze/usrp2/memory_map.h
+++ b/firmware/microblaze/usrp2/memory_map.h
@@ -375,6 +375,10 @@ typedef struct {
   volatile uint32_t     led_src;        // HW or SW control for LEDs
 } output_regs_t;
 
+#define CLK_RESET  (1<<4)
+#define CLK_ENABLE (1<<3) | (1<<2)
+#define CLK_SEL    (1<<1) | (1<<0)
+
 #define SERDES_ENABLE 8
 #define SERDES_PRBSEN 4
 #define SERDES_LOOPEN 2
diff --git a/firmware/microblaze/usrp2p/ethernet.c b/firmware/microblaze/usrp2p/ethernet.c
index 80c303153..660f28934 100644
--- a/firmware/microblaze/usrp2p/ethernet.c
+++ b/firmware/microblaze/usrp2p/ethernet.c
@@ -70,7 +70,7 @@ ed_link_up(int speed)
   ed_set_mac_speed(speed);
 
 	//turn on link LED for USRP2P
-	hal_set_leds((1 << 0), (1 << 0));
+	hal_set_leds(LED_RJ45, LED_RJ45);
 
 
   if (ed_callback)		// fire link changed callback
@@ -83,7 +83,7 @@ ed_link_down(void)
   // putstr("ed_link_down\n");
 
 	//turn off link LED for USRP2P
-	hal_set_leds(0, (1 << 0));
+	hal_set_leds(0, LED_RJ45);
 
   if (ed_callback)		// fire link changed callback
     (*ed_callback)(0);
diff --git a/firmware/microblaze/usrp2p/memory_map.h b/firmware/microblaze/usrp2p/memory_map.h
index fc0094e67..9c5b576d7 100644
--- a/firmware/microblaze/usrp2p/memory_map.h
+++ b/firmware/microblaze/usrp2p/memory_map.h
@@ -402,6 +402,10 @@ typedef struct {
   volatile uint32_t     led_src;        // HW or SW control for LEDs
 } output_regs_t;
 
+#define CLK_RESET  (1<<4)
+#define CLK_ENABLE (1<<3) | (1<<2)
+#define CLK_SEL    (1<<1) | (1<<0)
+
 #define SERDES_ENABLE 8
 #define SERDES_PRBSEN 4
 #define SERDES_LOOPEN 2
@@ -412,13 +416,13 @@ typedef struct {
 
 // crazy order that matches the labels on the case
 
-#define	LED_A		(1 << 4)
-#define	LED_B		(1 << 1)
-#define	LED_C		(1 << 3)
-#define	LED_D		(1 << 0)
-#define	LED_E		(1 << 2)
+#define	LED_A		(1 << 2)
+#define	LED_B		(1 << 5)
+#define	LED_E		(1 << 3)
+#define	LED_D		(1 << 1)
+#define	LED_C		(1 << 4)
 //      LED_F		// controlled by CPLD
-#define	LED_RJ45	(1 << 5)
+#define	LED_RJ45	(1 << 0)
 
 #define output_regs ((output_regs_t *) MISC_OUTPUT_BASE)