diff options
| author | Josh Blum <josh@joshknows.com> | 2011-02-17 13:58:27 -0800 |
|---|---|---|
| committer | Josh Blum <josh@joshknows.com> | 2011-02-17 13:58:27 -0800 |
| commit | c73165bb1d6ec6c714426584e3b1ef15e2e87cb4 (patch) | |
| tree | 09c7cc4b5684b2d8dca789c10346c39de9c3f2f4 /firmware/zpu/usrp2p | |
| parent | c88166d65651bb98fc182ae600a6649120c601b5 (diff) | |
| download | uhd-c73165bb1d6ec6c714426584e3b1ef15e2e87cb4.tar.gz uhd-c73165bb1d6ec6c714426584e3b1ef15e2e87cb4.tar.bz2 uhd-c73165bb1d6ec6c714426584e3b1ef15e2e87cb4.zip | |
usrp2: added 2nd dsp support to firmware for 2 and N series
Diffstat (limited to 'firmware/zpu/usrp2p')
| -rw-r--r-- | firmware/zpu/usrp2p/memory_map.h | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/firmware/zpu/usrp2p/memory_map.h b/firmware/zpu/usrp2p/memory_map.h index 2101989ff..2567a4588 100644 --- a/firmware/zpu/usrp2p/memory_map.h +++ b/firmware/zpu/usrp2p/memory_map.h @@ -218,8 +218,10 @@ hwconfig_wishbone_divisor(void) #define SR_UDP_SM 96 #define SR_TX_DSP 208 #define SR_TX_CTRL 224 -#define SR_RX_DSP 160 -#define SR_RX_CTRL 176 +#define SR_RX_DSP0 160 +#define SR_RX_DSP1 240 +#define SR_RX_CTRL0 176 +#define SR_RX_CTRL1 32 #define SR_TIME64 192 #define SR_SIMTIMER 198 #define SR_LAST 255 @@ -365,7 +367,8 @@ typedef struct { volatile uint32_t time_ticks; } sr_rx_ctrl_t; -#define sr_rx_ctrl0 ((sr_rx_ctrl_t *) _SR_ADDR(SR_RX_CTRL)) +#define sr_rx_ctrl0 ((sr_rx_ctrl_t *) _SR_ADDR(SR_RX_CTRL0)) +#define sr_rx_ctrl1 ((sr_rx_ctrl_t *) _SR_ADDR(SR_RX_CTRL1)) // ---------------------------------------------------------------- // VITA49 64 bit time (write only) |