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| author | Martin Braun <martin.braun@ettus.com> | 2014-10-07 09:39:25 +0200 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2014-10-07 09:39:25 +0200 |
| commit | 5bd58bc309e959537e3e820abfa39ee629b140a5 (patch) | |
| tree | 81e3a611134e02d9118f0aa846b7146234849fe8 /firmware/x300/include/xge_phy.h | |
| parent | 9f6a11173aef5e661100268bd746963d713adb91 (diff) | |
| download | uhd-5bd58bc309e959537e3e820abfa39ee629b140a5.tar.gz uhd-5bd58bc309e959537e3e820abfa39ee629b140a5.tar.bz2 uhd-5bd58bc309e959537e3e820abfa39ee629b140a5.zip | |
Reorganized firmware/ subdirectory (x300->usrp3, zpu->usrp2)
Diffstat (limited to 'firmware/x300/include/xge_phy.h')
| -rw-r--r-- | firmware/x300/include/xge_phy.h | 78 |
1 files changed, 0 insertions, 78 deletions
diff --git a/firmware/x300/include/xge_phy.h b/firmware/x300/include/xge_phy.h deleted file mode 100644 index eeb94753e..000000000 --- a/firmware/x300/include/xge_phy.h +++ /dev/null @@ -1,78 +0,0 @@ - -#ifndef INCLUDED_XGE_PHY_H -#define INCLUDED_XGE_PHY_H - -#define HAVE_AEL2005_PHY 1 - -// -// IEEE 802.3ae Clause 45 managable device types (DEVAD) -// -#define XGE_MDIO_DEVICE_PMA 1 -#define XGE_MDIO_DEVICE_WIS 2 -#define XGE_MDIO_DEVICE_PCS 3 -#define XGE_MDIO_DEVICE_PHY_XS 4 -#define XGE_MDIO_DEVICE_DTE_XS 5 -#define XGE_MDIO_DEVICE_TC 6 - -// -// IEEE 802.3ae Clause 45 register set for MDIO -// -#define XGE_MDIO_CONTROL1 0 -#define XGE_MDIO_STATUS1 1 -#define XGE_MDIO_DEVID1 2 -#define XGE_MDIO_DEVID2 3 -#define XGE_MDIO_SPEED 4 -#define XGE_MDIO_DEVICES1 5 -#define XGE_MDIO_DEVICES2 6 -#define XGE_MDIO_CONTROL2 7 -#define XGE_MDIO_STATUS2 8 -#define XGE_MDIO_LANESTATUS 24 -#define XGE_MDIO_TESTCTRL 25 -#define XILINX_CORE_VERSION 65535 - -// -// QR2 AEL2005 Phy address on MDIO (PORT ADDR) -// -#define XGE_MDIO_ADDR_PHY_A 0 - -// -// QR2 MDIO address of FPGA XAUI (DTE XS) (PORT ADDR) -// -#define XGE_MDIO_ADDR_XAUI_A 2 - -// -// ID's for all XGE interfaces -#define XGE_A 0 - -// PHY module types -enum { - SFFP_TYPE_NONE, - SFFP_TYPE_SR, - SFFP_TYPE_LR, - SFFP_TYPE_LRM, - SFFP_TYPE_TWINAX, - SFFP_TYPE_TWINAX_LONG, - SFFP_TYPE_UNKNOWN, - SFFP_TYPE_1000BASE_SX, - SFFP_TYPE_1000BASE_LX, - SFFP_TYPE_1000BASE_T -}; - -// PHY module I2C device address -// (I2C device driver shifts "7bit" address left 1 bit) -// SFF-8431 specifys the I2C address as 8 bits with lSB as X -enum { - MODULE_DEV_ADDR = (0xa0 >> 1), - SFF_DEV_ADDR = (0xa2 >>1), -}; - -// SFPP module status -enum { - SFFP_NO_CHANGE, - SFFP_REMOVED, - SFFP_INSERTED -}; - -#endif - - |