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authorAshish Chaudhari <ashish@ettus.com>2015-12-23 10:59:07 -0800
committerAshish Chaudhari <ashish@ettus.com>2016-01-05 17:35:14 -0800
commite92913f81a8a44def64dfcb7c0001d9ca7d2d2c4 (patch)
tree12d441822342db2e9e11b5cbe7c0fd156f0cba13 /firmware/usrp3/x300/x300_init.c
parentf45b4eb386a4c4cf5e7a463936fb4591d1bf8854 (diff)
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n230: Initial checkin of firmware files
Diffstat (limited to 'firmware/usrp3/x300/x300_init.c')
-rw-r--r--firmware/usrp3/x300/x300_init.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/firmware/usrp3/x300/x300_init.c b/firmware/usrp3/x300/x300_init.c
index ef97412a2..97b20032b 100644
--- a/firmware/usrp3/x300/x300_init.c
+++ b/firmware/usrp3/x300/x300_init.c
@@ -1,7 +1,7 @@
#include "x300_init.h"
#include "x300_defs.h"
#include "ethernet.h"
-#include "mdelay.h"
+#include "cron.h"
#include <wb_utils.h>
#include <wb_uart.h>
#include <wb_i2c.h>
@@ -121,6 +121,11 @@ static void putc(void *p, char c)
#endif
}
+static uint32_t get_counter_val()
+{
+ return wb_peek32(SR_ADDR(RB0_BASE, RB_COUNTER));
+}
+
void x300_init(void)
{
//first - uart
@@ -136,6 +141,9 @@ void x300_init(void)
UHD_FW_TRACE_FSTR(INFO, "-- FPGA Compat Number: %u.%u", (fpga_compat>>16), (fpga_compat&0xFFFF));
UHD_FW_TRACE_FSTR(INFO, "-- Clock Frequency: %u MHz", (CPU_CLOCK/1000000));
+ //Initialize cron
+ cron_init(get_counter_val, CPU_CLOCK);
+
//i2c rate init
wb_i2c_init(I2C0_BASE, CPU_CLOCK);
wb_i2c_init(I2C1_BASE, CPU_CLOCK);
@@ -163,7 +171,7 @@ void x300_init(void)
}
// For eth interfaces, initialize the PHY's
- mdelay(100);
+ sleep_ms(100);
ethernet_init(0);
ethernet_init(1);
}