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authorAshish Chaudhari <ashish@ettus.com>2016-06-23 16:22:06 -0700
committerAshish Chaudhari <ashish@ettus.com>2016-07-07 18:37:43 -0700
commit7cc16e5be09d29495db3e4076330ee66c8eeca24 (patch)
tree7d83445e4416447372e6852aa8a21daa4de87710 /firmware/usrp3/x300/x300_defs.h
parentabc4790ae4be6d542ea39c8ce42045c3fec40b9d (diff)
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x300: UHD is now compatible with FPGA images with Aurora support
- UHD and ZPU is now aware of Aurora SFP+ transceivers in the FPGA image - Added script to exercise Aurora BIST features
Diffstat (limited to 'firmware/usrp3/x300/x300_defs.h')
-rw-r--r--firmware/usrp3/x300/x300_defs.h20
1 files changed, 11 insertions, 9 deletions
diff --git a/firmware/usrp3/x300/x300_defs.h b/firmware/usrp3/x300/x300_defs.h
index c4011bd12..cb8b7324f 100644
--- a/firmware/usrp3/x300/x300_defs.h
+++ b/firmware/usrp3/x300/x300_defs.h
@@ -7,8 +7,8 @@
#define CPU_CLOCK 166666667
#define MAIN_RAM_BASE 0x0000
#define PKT_RAM0_BASE 0x8000
-#define XGE0_BASE 0xC000
-#define XGE1_BASE 0xD000
+#define SFP0_MAC_BASE 0xC000
+#define SFP1_MAC_BASE 0xD000
#define BOOT_LDR_BASE 0xFC00
#define UART0_BASE 0xfd00
#define UART0_BAUD 115200
@@ -21,9 +21,6 @@
#define RB0_BASE 0xa000 //same as set
#define SETXB_BASE 0xb000
-#define ETH1G
-//#define ETH10G
-
//eeprom map for mboard addrs
#define MBOARD_EEPROM_ADDR 0x50
@@ -49,11 +46,11 @@ static const int LED_LINKACT = (1 << 0);
static const int RB_COUNTER = 0;
static const int RB_SPI_RDY = 1;
static const int RB_SPI_DATA = 2;
-static const int RB_ETH_TYPE0 = 4;
-static const int RB_ETH_TYPE1 = 5;
+static const int RB_SFP0_TYPE = 4;
+static const int RB_SFP1_TYPE = 5;
static const int RB_FPGA_COMPAT = 6;
-static const int RB_SFPP_STATUS0 = 8;
-static const int RB_SFPP_STATUS1 = 9;
+static const int RB_SFP0_STATUS = 8;
+static const int RB_SFP1_STATUS = 9;
// Bootloader Memory Map
static const int BL_ADDRESS = 0;
@@ -73,4 +70,9 @@ static const int BL_DATA = 1;
#define ETH_FRAMER_DST_UDP_MAC 6
#define ETH_FRAMER_DST_MAC_LO 7
+// SFP type constants
+#define RB_SFP_1G_ETH 0
+#define RB_SFP_10G_ETH 1
+#define RB_SFP_AURORA 2
+
#endif /* INCLUDED_X300_DEFS_H */