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| author | mguyler-ni <mark.guyler@ni.com> | 2019-02-26 17:43:34 -0800 |
|---|---|---|
| committer | Michael West <michael.west@ettus.com> | 2019-03-05 10:34:06 -0800 |
| commit | 5b29b95de8219e8da26fd6c3e2b4a735caaf4374 (patch) | |
| tree | 73652fd8b61a6cfc6fefc94df42266e665a2bed7 /firmware/octoclock | |
| parent | 95b84163f448eb942590071b02b57569a2f3e5fd (diff) | |
| download | uhd-5b29b95de8219e8da26fd6c3e2b4a735caaf4374.tar.gz uhd-5b29b95de8219e8da26fd6c3e2b4a735caaf4374.tar.bz2 uhd-5b29b95de8219e8da26fd6c3e2b4a735caaf4374.zip | |
x300: Change PLL CP currents in x300_clock_ctrl
- modify PLL charge pump values to improve phase coherence
- affects reference clocks of 11.52 MHz, 23.04 MHz, and 30.72 MHz
Diffstat (limited to 'firmware/octoclock')
0 files changed, 0 insertions, 0 deletions