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| author | buoyboy <john.malsbury@ettus.com> | 2013-06-17 10:32:57 -0700 |
|---|---|---|
| committer | Nicholas Corgan <nick.corgan@ettus.com> | 2013-08-20 15:34:23 -0700 |
| commit | 823273c63247e764bafe2bb9ad651bfbf5812c5b (patch) | |
| tree | be67d2594f6fa5bdf4db81933ccb37b44d17a965 /firmware/octoclock | |
| parent | 9c3fd671810abf0d39d7baa78073b90b95d9b5bc (diff) | |
| download | uhd-823273c63247e764bafe2bb9ad651bfbf5812c5b.tar.gz uhd-823273c63247e764bafe2bb9ad651bfbf5812c5b.tar.bz2 uhd-823273c63247e764bafe2bb9ad651bfbf5812c5b.zip | |
Corrected PDD1 config on gps_nmea neet
Diffstat (limited to 'firmware/octoclock')
| -rw-r--r-- | firmware/octoclock/OctoClock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/octoclock/OctoClock.c b/firmware/octoclock/OctoClock.c index 07397601d..d81a93fc3 100644 --- a/firmware/octoclock/OctoClock.c +++ b/firmware/octoclock/OctoClock.c @@ -535,7 +535,7 @@ DDRC = ~( 1<<DDC1 ); // All bits are outputs, except PC1. including the 5 Not * */ PORTD = 0; // Initial Value is all zeros -DDRD = 1<<DDD1 | 1<<DDD3; +DDRD = 1<<DDD3; |