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author | Josh Blum <josh@joshknows.com> | 2010-03-31 18:55:48 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2010-03-31 18:55:48 -0700 |
commit | f15df8146cffb6cf42e0365396484af085be5df4 (patch) | |
tree | a3bfdb25899c18355ca290a17d62ccd9b1fd7d5f /firmware/microblaze | |
parent | 38248b816c75bcf60eca69244d363cae2397ce47 (diff) | |
download | uhd-f15df8146cffb6cf42e0365396484af085be5df4.tar.gz uhd-f15df8146cffb6cf42e0365396484af085be5df4.tar.bz2 uhd-f15df8146cffb6cf42e0365396484af085be5df4.zip |
Moved dsp (rx and tx), time config, and clock config (mostly) into the host.
Diffstat (limited to 'firmware/microblaze')
-rw-r--r-- | firmware/microblaze/apps/txrx.c | 116 |
1 files changed, 0 insertions, 116 deletions
diff --git a/firmware/microblaze/apps/txrx.c b/firmware/microblaze/apps/txrx.c index 926260bac..430ae2fac 100644 --- a/firmware/microblaze/apps/txrx.c +++ b/firmware/microblaze/apps/txrx.c @@ -250,47 +250,6 @@ void handle_udp_ctrl_packet( break; /******************************************************************* - * Clock Config - ******************************************************************/ - case USRP2_CTRL_ID_HERES_A_NEW_CLOCK_CONFIG_BRO: - //TODO handle MC_PROVIDE_CLK_TO_MIMO when we do MIMO setup - ctrl_data_out.id = USRP2_CTRL_ID_GOT_THE_NEW_CLOCK_CONFIG_DUDE; - - //handle the 10 mhz ref source - uint32_t ref_flags = 0; - switch(ctrl_data_out.data.clock_config.ref_source){ - case USRP2_REF_SOURCE_INT: - ref_flags = MC_WE_DONT_LOCK; break; - case USRP2_REF_SOURCE_SMA: - ref_flags = MC_WE_LOCK_TO_SMA; break; - case USRP2_REF_SOURCE_MIMO: - ref_flags = MC_WE_LOCK_TO_MIMO; break; - } - clocks_mimo_config(ref_flags & MC_REF_CLK_MASK); - - //handle the pps config - uint32_t pps_flags = 0; - - //fill in the pps polarity flags - switch(ctrl_data_out.data.clock_config.pps_polarity){ - case USRP2_PPS_POLARITY_POS: - pps_flags |= 0x01 << 0; break; - case USRP2_PPS_POLARITY_NEG: - pps_flags |= 0x00 << 0; break; - } - - //fill in the pps source flags - switch(ctrl_data_out.data.clock_config.pps_source){ - case USRP2_PPS_SOURCE_SMA: - pps_flags |= 0x00 << 1; break; - case USRP2_PPS_SOURCE_MIMO: - pps_flags |= 0x01 << 1; break; - } - sr_time64->flags = pps_flags; - - break; - - /******************************************************************* * SPI ******************************************************************/ case USRP2_CTRL_ID_TRANSACT_ME_SOME_SPI_BRO:{ @@ -386,34 +345,6 @@ void handle_udp_ctrl_packet( break; /******************************************************************* - * DDC - ******************************************************************/ - case USRP2_CTRL_ID_SETUP_THIS_DDC_FOR_ME_BRO: - dsp_rx_regs->freq = ctrl_data_in->data.ddc_args.freq_word; - dsp_rx_regs->scale_iq = ctrl_data_in->data.ddc_args.scale_iq; - - //setup the interp and half band filters - { - uint32_t decim = ctrl_data_in->data.ddc_args.decim; - uint32_t hb1 = 0; - uint32_t hb2 = 0; - if (!(decim & 1)){ - hb2 = 1; - decim = decim >> 1; - } - if (!(decim & 1)){ - hb1 = 1; - decim = decim >> 1; - } - uint32_t decim_word = (hb1<<9) | (hb2<<8) | decim; - dsp_rx_regs->decim_rate = decim_word; - printf("Decim: %d, register %d\n", ctrl_data_in->data.ddc_args.decim, decim_word); - } - - ctrl_data_out.id = USRP2_CTRL_ID_TOTALLY_SETUP_THE_DDC_DUDE; - break; - - /******************************************************************* * Streaming ******************************************************************/ case USRP2_CTRL_ID_SEND_STREAM_COMMAND_FOR_ME_BRO:{ @@ -478,53 +409,6 @@ void handle_udp_ctrl_packet( } /******************************************************************* - * DUC - ******************************************************************/ - case USRP2_CTRL_ID_SETUP_THIS_DUC_FOR_ME_BRO: - dsp_tx_regs->freq = ctrl_data_in->data.duc_args.freq_word; - dsp_tx_regs->scale_iq = ctrl_data_in->data.duc_args.scale_iq; - - //setup the interp and half band filters - { - uint32_t interp = ctrl_data_in->data.duc_args.interp; - uint32_t hb1 = 0; - uint32_t hb2 = 0; - if (!(interp & 1)){ - hb2 = 1; - interp = interp >> 1; - } - if (!(interp & 1)){ - hb1 = 1; - interp = interp >> 1; - } - uint32_t interp_word = (hb1<<9) | (hb2<<8) | interp; - dsp_tx_regs->interp_rate = interp_word; - printf("Interp: %d, register %d\n", ctrl_data_in->data.duc_args.interp, interp_word); - } - - ctrl_data_out.id = USRP2_CTRL_ID_TOTALLY_SETUP_THE_DUC_DUDE; - break; - - /******************************************************************* - * Time Config - ******************************************************************/ - case USRP2_CTRL_ID_GOT_A_NEW_TIME_FOR_YOU_BRO: - sr_time64->imm = (ctrl_data_in->data.time_args.now == 0)? 0 : 1; - sr_time64->ticks = ctrl_data_in->data.time_args.ticks; - sr_time64->secs = ctrl_data_in->data.time_args.secs; //set this last to latch the regs - ctrl_data_out.id = USRP2_CTRL_ID_SWEET_I_GOT_THAT_TIME_DUDE; - break; - - /******************************************************************* - * MUX Config - ******************************************************************/ - case USRP2_CTRL_ID_UPDATE_THOSE_MUX_SETTINGS_BRO: - dsp_rx_regs->rx_mux = ctrl_data_in->data.mux_args.rx_mux; - dsp_tx_regs->tx_mux = ctrl_data_in->data.mux_args.tx_mux; - ctrl_data_out.id = USRP2_CTRL_ID_UPDATED_THE_MUX_SETTINGS_DUDE; - break; - - /******************************************************************* * Peek and Poke Register ******************************************************************/ case USRP2_CTRL_ID_POKE_THIS_REGISTER_FOR_ME_BRO: |