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authorJosh Blum <josh@joshknows.com>2010-11-24 20:26:38 -0800
committerJosh Blum <josh@joshknows.com>2010-12-11 18:43:10 -0800
commitecdb22b449e13d1ded69b82e5736d4c09c7db23a (patch)
tree9e10552b20f0b3365b483b8e05b0db3d1c2a1e12 /firmware/microblaze/usrp2p/memory_map.h
parent59a7133edf4ce2a939ac2b9a3264623fb269e9c6 (diff)
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packet_router: added cpu input and output control registers, modified control code
Diffstat (limited to 'firmware/microblaze/usrp2p/memory_map.h')
-rw-r--r--firmware/microblaze/usrp2p/memory_map.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/firmware/microblaze/usrp2p/memory_map.h b/firmware/microblaze/usrp2p/memory_map.h
index dedfdac8b..277f433c5 100644
--- a/firmware/microblaze/usrp2p/memory_map.h
+++ b/firmware/microblaze/usrp2p/memory_map.h
@@ -273,9 +273,11 @@ hwconfig_wishbone_divisor(void)
// --- buffer pool control regs ---
typedef struct {
- volatile uint32_t ctrl;
+ volatile uint32_t misc_ctrl;
volatile uint32_t ip_addr;
volatile uint32_t udp_ports; //dsp0 (low 16) dsp1 (high 16)
+ volatile uint32_t cpu_out_ctrl;
+ volatile uint32_t cpu_inp_ctrl;
} buffer_pool_ctrl_t;
#define buffer_pool_ctrl ((buffer_pool_ctrl_t *) BUFFER_POOL_CTRL_BASE)