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authorJosh Blum <josh@joshknows.com>2010-05-27 23:09:09 +0000
committerJosh Blum <josh@joshknows.com>2010-05-27 23:09:09 +0000
commite940d0225944a210584c386d270d09b132b5514b (patch)
tree59188c0b162c29c02ed09a59b32ab84010ecf269 /firmware/microblaze/lib
parentf113ae17863729f05b6ada815b9817cd16001211 (diff)
parent4eff47a4b66eff61feffe6498b9ecebef94dc6b9 (diff)
downloaduhd-e940d0225944a210584c386d270d09b132b5514b.tar.gz
uhd-e940d0225944a210584c386d270d09b132b5514b.tar.bz2
uhd-e940d0225944a210584c386d270d09b132b5514b.zip
Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into usrp_e
Conflicts: host/utils/CMakeLists.txt
Diffstat (limited to 'firmware/microblaze/lib')
-rw-r--r--firmware/microblaze/lib/Makefile.am1
-rw-r--r--firmware/microblaze/lib/banal.c18
-rw-r--r--firmware/microblaze/lib/banal.h3
-rw-r--r--firmware/microblaze/lib/clocks.c30
-rw-r--r--firmware/microblaze/lib/clocks.h10
-rw-r--r--firmware/microblaze/lib/hal_io.c128
-rw-r--r--firmware/microblaze/lib/hal_io.h58
-rw-r--r--firmware/microblaze/lib/memory_map.h4
-rw-r--r--firmware/microblaze/lib/print_fxpt.c83
-rw-r--r--firmware/microblaze/lib/print_mac_addr.c10
-rw-r--r--firmware/microblaze/lib/u2_init.c21
11 files changed, 24 insertions, 342 deletions
diff --git a/firmware/microblaze/lib/Makefile.am b/firmware/microblaze/lib/Makefile.am
index 783895850..b51d74463 100644
--- a/firmware/microblaze/lib/Makefile.am
+++ b/firmware/microblaze/lib/Makefile.am
@@ -44,7 +44,6 @@ libu2fw_a_SOURCES = \
pic.c \
print_mac_addr.c \
print_rmon_regs.c \
- print_fxpt.c \
print_buffer.c \
printf.c \
sd.c \
diff --git a/firmware/microblaze/lib/banal.c b/firmware/microblaze/lib/banal.c
index 23f5f3b8a..42937957f 100644
--- a/firmware/microblaze/lib/banal.c
+++ b/firmware/microblaze/lib/banal.c
@@ -29,21 +29,3 @@ get_uint64(const unsigned char *s)
{
return (((uint64_t)get_uint32(s)) << 32) | get_uint32(s+4);
}
-
-uint32_t
-divide_uint64(uint64_t dividend, uint32_t divisor)
-{
- uint32_t result = 0;
- uint64_t dividend_ = 0;
- for(int i = 31; i >= 0; i--){
- //approximate the divisor with the ith result bit set
- uint64_t tmp = dividend_;
- tmp += (uint64_t)divisor << i;
- //set the ith result bit if the approximation is less
- if (tmp <= dividend){
- dividend_ = tmp;
- result |= 1 << i;
- }
- }
- return result;
-}
diff --git a/firmware/microblaze/lib/banal.h b/firmware/microblaze/lib/banal.h
index 6d9420602..7b3c71a20 100644
--- a/firmware/microblaze/lib/banal.h
+++ b/firmware/microblaze/lib/banal.h
@@ -87,7 +87,4 @@ get_int64(const unsigned char *s)
void
print_ip(struct ip_addr ip);
-uint32_t
-divide_uint64(uint64_t dividend, uint32_t divisor);
-
#endif /* INCLUDED_BANAL_H */
diff --git a/firmware/microblaze/lib/clocks.c b/firmware/microblaze/lib/clocks.c
index d9d4fcd3c..ccc4a7cc7 100644
--- a/firmware/microblaze/lib/clocks.c
+++ b/firmware/microblaze/lib/clocks.c
@@ -48,14 +48,14 @@ clocks_init(void)
clocks_mimo_config(MC_WE_DONT_LOCK);
// Set up other clocks
- clocks_enable_test_clk(false, 0);
- clocks_enable_tx_dboard(false, 0);
- clocks_enable_rx_dboard(false, 0);
+ //clocks_enable_test_clk(false, 0);
+ //clocks_enable_tx_dboard(false, 0);
+ //clocks_enable_rx_dboard(false, 0);
clocks_enable_eth_phyclk(false, 0);
// Enable clock to ADCs and DACs
- clocks_enable_dac_clk(true, 1);
- clocks_enable_adc_clk(true, 1);
+ //clocks_enable_dac_clk(true, 1);
+ //clocks_enable_adc_clk(true, 1);
}
@@ -168,11 +168,11 @@ clocks_enable_XXX_clk(bool enable, int divisor, int reg_en, int reg_div, int mod
}
// Clock 0
-void
+/*void
clocks_enable_test_clk(bool enable, int divisor)
{
clocks_enable_XXX_clk(enable,divisor,0x3C,0x48,CLOCK_MODE_PECL);
-}
+}*/
// Clock 1
void
@@ -211,29 +211,29 @@ clocks_enable_eth_phyclk(bool enable, int divisor)
}
// Clock 3
-void
+/*void
clocks_enable_dac_clk(bool enable, int divisor)
{
clocks_enable_XXX_clk(enable,divisor,0x3F,0x4E,CLOCK_MODE_PECL);
-}
+}*/
// Clock 4
-void
+/*void
clocks_enable_adc_clk(bool enable, int divisor)
{
clocks_enable_XXX_clk(enable,divisor,0x40,0x50,CLOCK_MODE_LVDS);
-}
+}*/
// Clock 6
-void
+/*void
clocks_enable_tx_dboard(bool enable, int divisor)
{
clocks_enable_XXX_clk(enable,divisor,0x42,0x54,CLOCK_MODE_CMOS);
-}
+}*/
// Clock 7
-void
+/*void
clocks_enable_rx_dboard(bool enable, int divisor)
{
clocks_enable_XXX_clk(enable,divisor,0x43,0x56,CLOCK_MODE_CMOS);
-}
+}*/
diff --git a/firmware/microblaze/lib/clocks.h b/firmware/microblaze/lib/clocks.h
index 141fc61e0..43d5a05c2 100644
--- a/firmware/microblaze/lib/clocks.h
+++ b/firmware/microblaze/lib/clocks.h
@@ -53,7 +53,7 @@ bool clocks_lock_detect();
/*!
* \brief Enable or disable test clock (extra clock signal)
*/
-void clocks_enable_test_clk(bool enable, int divisor);
+//void clocks_enable_test_clk(bool enable, int divisor);
/*!
* \brief Enable or disable fpga clock. Disabling would wedge and require a power cycle.
@@ -73,23 +73,23 @@ void clocks_enable_eth_phyclk(bool enable, int divisor);
/*!
* \brief Enable or disable clock to DAC
*/
-void clocks_enable_dac_clk(bool enable, int divisor);
+//void clocks_enable_dac_clk(bool enable, int divisor);
/*!
* \brief Enable or disable clock to ADC
*/
-void clocks_enable_adc_clk(bool enable, int divisor);
+//void clocks_enable_adc_clk(bool enable, int divisor);
/*!
* \brief Enable or disable clock to Rx daughterboard
*/
-void clocks_enable_rx_dboard(bool enable, int divisor);
+//void clocks_enable_rx_dboard(bool enable, int divisor);
/*!
* \brief Enable or disable clock to Tx daughterboard
*/
-void clocks_enable_tx_dboard(bool enable, int divisor);
+//void clocks_enable_tx_dboard(bool enable, int divisor);
#endif /* INCLUDED_CLOCKS_H */
diff --git a/firmware/microblaze/lib/hal_io.c b/firmware/microblaze/lib/hal_io.c
index fdfa15000..0afd6a2cc 100644
--- a/firmware/microblaze/lib/hal_io.c
+++ b/firmware/microblaze/lib/hal_io.c
@@ -24,134 +24,6 @@
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
-//#include <assert.h>
-
-/*
- * ========================================================================
- * GPIOS
- * ========================================================================
- */
-void
-hal_gpio_set_ddr(int bank, int value, int mask)
-{
- bank &= 0x1;
-
- if (bank == GPIO_TX_BANK){ // tx in top half
- value <<= 16;
- mask <<= 16;
- }
- else {
- value &= 0xffff;
- mask &= 0xffff;
- }
-
- int ei = hal_disable_ints();
- gpio_base->ddr = (gpio_base->ddr & ~mask) | (value & mask);
- hal_restore_ints(ei);
-}
-
-static bool
-code_to_int(char code, int *val)
-{
- switch(code){
- case 's': *val = GPIO_SEL_SW; return true;
- case 'a': *val = GPIO_SEL_ATR; return true;
- case '0': *val = GPIO_SEL_DEBUG_0; return true;
- case '1': *val = GPIO_SEL_DEBUG_1; return true;
- case '.':
- default:
- return false;
- }
-}
-
-void
-hal_gpio_set_sel(int bank, int bitno, char code)
-{
- bank &= 0x1;
- int t;
-
- if (!code_to_int(code, &t))
- return;
-
- int val = t << (2 * bitno);
- int mask = 0x3 << (2 * bitno);
-
- volatile uint32_t *sel = bank == GPIO_TX_BANK ? &gpio_base->tx_sel : &gpio_base->rx_sel;
- int ei = hal_disable_ints();
- int v = (*sel & ~mask) | (val & mask);
- *sel = v;
- hal_restore_ints(ei);
-
- if (0)
- printf("hal_gpio_set_sel(bank=%d, bitno=%d, code=%c) *sel = 0x%x\n",
- bank, bitno, code, v);
-}
-
-void
-hal_gpio_set_sels(int bank, char *codes)
-{
- //assert(strlen(codes) == 16);
-
- int val = 0;
- int mask = 0;
- int i;
-
- for (i = 15; i >= 0; i--){
- val <<= 2;
- mask <<= 2;
- int t;
- if (code_to_int(codes[i], &t)){
- val |= t;
- mask |= 0x3;
- }
- }
-
- volatile uint32_t *sel = bank == GPIO_TX_BANK ? &gpio_base->tx_sel : &gpio_base->rx_sel;
- int ei = hal_disable_ints();
- *sel = (*sel & ~mask) | (val & mask);
- hal_restore_ints(ei);
-}
-
-
-/*!
- * \brief write \p value to gpio pins specified by \p mask.
- */
-void
-hal_gpio_write(int bank, int value, int mask)
-{
- static uint32_t _gpio_io_shadow;
-
- bank &= 0x1;
-
- if (bank == GPIO_TX_BANK){ // tx in top half
- value <<= 16;
- mask <<= 16;
- }
- else {
- value &= 0xffff;
- mask &= 0xffff;
- }
-
- //int ei = hal_disable_ints();
- _gpio_io_shadow = (_gpio_io_shadow & ~mask) | (value & mask);
- gpio_base->io = _gpio_io_shadow;
- //hal_restore_ints(ei);
-}
-
-
-/*!
- * \brief read GPIO bits
- */
-int
-hal_gpio_read(int bank)
-{
- bank &= 0x1;
- int r = gpio_base->io;
- if (bank == GPIO_TX_BANK)
- r >>= 16;
-
- return r & 0xffff;
-}
/*
* ========================================================================
diff --git a/firmware/microblaze/lib/hal_io.h b/firmware/microblaze/lib/hal_io.h
index f8ec617f8..d8967f063 100644
--- a/firmware/microblaze/lib/hal_io.h
+++ b/firmware/microblaze/lib/hal_io.h
@@ -24,64 +24,6 @@
void hal_io_init(void);
void hal_finish();
-
-/*
- * ------------------------------------------------------------------------
- * The GPIO pins are organized into two banks of 16-bits.
- * Bank 0 goes to the Tx daughterboard, Bank 1 goes to the Rx daughterboard.
- *
- * Each pin may be configured as an input or an output from the FPGA.
- * For output pins, there are four signals which may be routed to the
- * pin. The four signals are the value written by s/w, the output of
- * the ATR controller, or two different sources of debug info from the
- * FPGA fabric.
- * ------------------------------------------------------------------------
- */
-
-#define GPIO_TX_BANK 0 // pins that connect to the Tx daughterboard
-#define GPIO_RX_BANK 1 // pins that connect to the Rx daughterboard
-
-
-/*!
- * \brief Set the data direction for GPIO pins
- *
- * If the bit is set, it's an output from the FPGA.
- * \param value is a 16-bit bitmask of values
- * \param mask is a 16-bit bitmask of which bits to effect.
- */
-void hal_gpio_set_ddr(int bank, int value, int mask);
-
-/*!
- * \brief Select the source of the signal for an output pin.
- *
- * \param code is is one of 's', 'a', '0', '1'
- * where 's' selects software output, 'a' selects ATR output, '0' selects
- * debug 0, '1' selects debug 1.
- */
-void hal_gpio_set_sel(int bank, int bitno, char code);
-
-/*!
- * \brief Select the source of the signal for the output pins.
- *
- * \param codes is is a string of 16 characters composed of '.', 's',
- * 'a', '0', or '1' where '.' means "don't change", 's' selects
- * software output, 'a' selects ATR output, '0' selects debug 0, '1'
- * selects debug 1.
- */
-void hal_gpio_set_sels(int bank, char *codes);
-
-
-/*!
- * \brief write \p value to gpio pins specified by \p mask.
- */
-void hal_gpio_write(int bank, int value, int mask);
-
-/*!
- * \brief read GPIO bits
- */
-int hal_gpio_read(int bank);
-
-
/*
* ------------------------------------------------------------------------
* control the leds
diff --git a/firmware/microblaze/lib/memory_map.h b/firmware/microblaze/lib/memory_map.h
index fed1e5259..cdf3dd338 100644
--- a/firmware/microblaze/lib/memory_map.h
+++ b/firmware/microblaze/lib/memory_map.h
@@ -525,10 +525,6 @@ typedef struct {
volatile uint32_t pad[7]; // Make each structure 16 elements long
} sr_rx_ctrl_t;
-#define MAX_SAMPLES_PER_CMD 0x3fffffff
-#define MK_RX_CMD(nsamples, now, chain) \
- ((((now) & 0x1) << 31) | (((chain) & 0x1) << 30) | ((nsamples) & 0x3fffffff))
-
#define sr_rx_ctrl ((sr_rx_ctrl_t *) _SR_ADDR(SR_RX_CTRL))
// --- dsp rx regs ---
diff --git a/firmware/microblaze/lib/print_fxpt.c b/firmware/microblaze/lib/print_fxpt.c
deleted file mode 100644
index 185bbc51b..000000000
--- a/firmware/microblaze/lib/print_fxpt.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/* -*- c++ -*- */
-/*
- * Copyright 2008 Free Software Foundation, Inc.
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-#include <nonstdio.h>
-
-/*
- * print uint64_t
- */
-void
-print_uint64(uint64_t u)
-{
- const char *_hex = "0123456789ABCDEF";
- if (u >= 10)
- print_uint64(u/10);
- putchar(_hex[u%10]);
-}
-
-static void
-print_thousandths(int thousandths)
-{
- putchar('.');
- if (thousandths < 100)
- putchar('0');
- if (thousandths < 10)
- putchar('0');
- printf("%d", thousandths);
-}
-
-
-void
-print_fxpt_freq(u2_fxpt_freq_t v)
-{
- if (v < 0){
- v = -v;
- putchar('-');
- }
-
- int64_t int_part = v >> 20;
- int32_t frac_part = v & ((1 << 20) - 1);
-
-#if 0
- // would work, if we had it
- printf("%lld.%03d", int_part, (frac_part * 1000) >> 20);
-#else
- print_uint64(int_part);
- print_thousandths((frac_part * 1000) >> 20);
-#endif
-}
-
-void
-print_fxpt_gain(u2_fxpt_gain_t v)
-{
- if (v < 0){
- v = -v;
- putchar('-');
- }
-
- int32_t int_part = v >> 7;
- int32_t frac_part = v & ((1 << 7) - 1);
-
-#if 0
- // would work, if we had it
- printf("%d.%03d", int_part, (frac_part * 1000) >> 7);
-#else
- printf("%d", int_part);
- print_thousandths((frac_part * 1000) >> 7);
-#endif
-}
-
diff --git a/firmware/microblaze/lib/print_mac_addr.c b/firmware/microblaze/lib/print_mac_addr.c
index 838fd614a..475082325 100644
--- a/firmware/microblaze/lib/print_mac_addr.c
+++ b/firmware/microblaze/lib/print_mac_addr.c
@@ -20,11 +20,9 @@
void
print_mac_addr(const unsigned char addr[6])
{
- puthex8(addr[0]); putchar(':');
- puthex8(addr[1]); putchar(':');
- puthex8(addr[2]); putchar(':');
- puthex8(addr[3]); putchar(':');
- puthex8(addr[4]); putchar(':');
- puthex8(addr[5]);
+ for(size_t i = 0; i < 6; i++){
+ if(i) putchar(':');
+ puthex8(addr[i]);
+ }
}
diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c
index 399d834cb..6809101c0 100644
--- a/firmware/microblaze/lib/u2_init.c
+++ b/firmware/microblaze/lib/u2_init.c
@@ -46,15 +46,6 @@ get_hw_rev(void)
bool
u2_init(void)
{
- // Set GPIOs to inputs, disable GPIO streaming
- hal_gpio_set_ddr(GPIO_TX_BANK, 0x0000, 0xffff);
- hal_gpio_set_ddr(GPIO_RX_BANK, 0x0000, 0xffff);
-
- hal_gpio_write(GPIO_TX_BANK, 0x0000, 0xffff); // init s/w output value to zero
- hal_gpio_write(GPIO_RX_BANK, 0x0000, 0xffff);
-
- dsp_rx_regs->gpio_stream_enable = 0; // I, Q LSBs come from DSP
-
hal_io_init();
// init spi, so that we can switch over to the high-speed clock
@@ -67,18 +58,6 @@ u2_init(void)
// set up the default clocks
clocks_init();
- // clocks_enable_test_clk(true,1);
-
- // Enable ADCs
- output_regs->adc_ctrl = ADC_CTRL_ON;
-
- // Initial values for tx and rx mux registers
- dsp_tx_regs->tx_mux = 0x10;
- dsp_rx_regs->rx_mux = 0x44444444;
-
- // Set up serdes
- output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN);
-
pic_init(); // progammable interrupt controller
bp_init(); // buffer pool