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author | Josh Blum <josh@joshknows.com> | 2010-05-10 14:18:00 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2010-05-10 14:18:00 -0700 |
commit | 650e0d9b35eeca9cec3989159310f4d5e3d38836 (patch) | |
tree | d311fffb7abb84e61c76251df5cdcd0383cf3918 /firmware/microblaze/lib/u2_init.c | |
parent | 9c7c178f70f8a78dc638d5f4301407893351b4fd (diff) | |
parent | 30bd666e306cb8f8c947c6ba99a76f7c49484597 (diff) | |
download | uhd-650e0d9b35eeca9cec3989159310f4d5e3d38836.tar.gz uhd-650e0d9b35eeca9cec3989159310f4d5e3d38836.tar.bz2 uhd-650e0d9b35eeca9cec3989159310f4d5e3d38836.zip |
Merge branch 'shrinkfw' into usrp2
Diffstat (limited to 'firmware/microblaze/lib/u2_init.c')
-rw-r--r-- | firmware/microblaze/lib/u2_init.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/firmware/microblaze/lib/u2_init.c b/firmware/microblaze/lib/u2_init.c index 399d834cb..6809101c0 100644 --- a/firmware/microblaze/lib/u2_init.c +++ b/firmware/microblaze/lib/u2_init.c @@ -46,15 +46,6 @@ get_hw_rev(void) bool u2_init(void) { - // Set GPIOs to inputs, disable GPIO streaming - hal_gpio_set_ddr(GPIO_TX_BANK, 0x0000, 0xffff); - hal_gpio_set_ddr(GPIO_RX_BANK, 0x0000, 0xffff); - - hal_gpio_write(GPIO_TX_BANK, 0x0000, 0xffff); // init s/w output value to zero - hal_gpio_write(GPIO_RX_BANK, 0x0000, 0xffff); - - dsp_rx_regs->gpio_stream_enable = 0; // I, Q LSBs come from DSP - hal_io_init(); // init spi, so that we can switch over to the high-speed clock @@ -67,18 +58,6 @@ u2_init(void) // set up the default clocks clocks_init(); - // clocks_enable_test_clk(true,1); - - // Enable ADCs - output_regs->adc_ctrl = ADC_CTRL_ON; - - // Initial values for tx and rx mux registers - dsp_tx_regs->tx_mux = 0x10; - dsp_rx_regs->rx_mux = 0x44444444; - - // Set up serdes - output_regs->serdes_ctrl = (SERDES_ENABLE | SERDES_RXEN); - pic_init(); // progammable interrupt controller bp_init(); // buffer pool |