Merge branch 'master' of ettus.sourcerepo.com:ettus/uhdpriv into flow_ctrl

Conflicts:
	host/lib/transport/udp_simple.cpp
	host/lib/usrp/usrp2/mboard_impl.cpp
	host/lib/usrp/usrp2/usrp2_iface.cpp
	host/lib/usrp/usrp2/usrp2_regs.hpp

5 files changed, 334 insertions, 0 deletions

diff --git a/firmware/microblaze/apps/blinkenlights.c b/firmware/microblaze/apps/blinkenlights.c
new file mode 100644
index 000000000..4cebe5c9d
--- /dev/null
+++ b/firmware/microblaze/apps/blinkenlights.c
@@ -0,0 +1,26 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2010 Ettus Research LLC
+ *
+ */
+
+#include "memory_map.h"
+#include <nonstdio.h>
+
+int main(int argc, char *argv[]) {
+
+	uint32_t c = 0;
+	uint8_t i = 0;
+
+	while(1) {
+		//delay(5000000);
+		for(c=0;c<5000000;c++) asm("NOP");
+		output_regs->leds = (i++ % 2) ? 0xFF : 0x00; //blink everything on that register
+	}
+
+	return 0;
+}
+
+//void delay(uint32_t t) {
+//	while(t-- != 0) asm("NOP");
+//}
diff --git a/firmware/microblaze/apps/flash_test.c b/firmware/microblaze/apps/flash_test.c
new file mode 100644
index 000000000..5b4569030
--- /dev/null
+++ b/firmware/microblaze/apps/flash_test.c
@@ -0,0 +1,67 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2010 Ettus Research LLC
+ *
+ */
+
+#include <memory_map.h>
+#include <hal_io.h>
+#include <hal_uart.h>
+#include <xilinx_s3_icap.h>
+#include <nonstdio.h>
+#include <spi_flash.h>
+#include <spi.h>
+#include <clocks.h>
+#include <string.h>
+
+//just a test to write to SPI flash and retrieve the same values.
+//uses the MOBFLEET SPI flash library
+
+void delay(uint32_t t) {
+	while(t-- != 0) asm("NOP");
+}
+
+int main(int argc, char *argv[]) {
+	uint16_t i, t;
+	uint8_t buf[260];
+	const uint8_t testdata[] = {0xDE, 0xAD, 0xBE, 0xEF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C};
+
+  hal_disable_ints();	// In case we got here via jmp 0x0
+//	spi_init();
+  hal_uart_init();
+//	clocks_init(); //set up AD9510, enable FPGA clock @ 1x divisor
+
+	puts("SPI Flash test\n");
+	puts("Initializing SPI\n");
+
+	spif_init();
+	delay(800000);
+	puts("Erasing sector 1\n");
+	spi_flash_erase(0x00010000, 256);
+	delay(800000);
+	puts("Reading back data\n");
+	spi_flash_read(0x00010000, 256, buf);
+	delay(800000);
+
+	t=1;
+	for(i=4; i<250; i++) {
+		if(buf[i] != 0xFF) t=0;
+	}
+
+	if(!t) puts("Data was not initialized to 0xFF. Unsuccessful erase or read\n");
+	else puts("Data initialized to 0xFF, erase confirmed\n");
+
+	puts("Writing test buffer\n");
+	spi_flash_program(0x00010000, 16, testdata);
+	//memset(buf, 0, 256);
+
+	delay(800000);
+	puts("Wrote data, reading back\n");
+
+	spi_flash_read(0x00010000, 16, buf);
+
+	if(memcmp(testdata, buf, 16)) puts("Data is not the same between read and write. Unsuccessful write or read\n");
+	else puts("Successful write! Flash write correct\n");
+
+	return 0;
+}
diff --git a/firmware/microblaze/apps/hardware_testbed.c b/firmware/microblaze/apps/hardware_testbed.c
new file mode 100644
index 000000000..e68e68ff7
--- /dev/null
+++ b/firmware/microblaze/apps/hardware_testbed.c
@@ -0,0 +1,47 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2010 Ettus Research LLC
+ *
+ */
+
+#include <memory_map.h>
+#include <nonstdio.h>
+#include <hal_io.h>
+#include <xilinx_s3_icap.h>
+#include <spi_flash.h>
+//#include <spi_flash_private.h>
+#include <clocks.h>
+#include <ihex.h>
+#include <bootloader_utils.h>
+#include <string.h>
+#include <hal_uart.h>
+#include <spi.h>
+
+//so this is just an evolving file used to set up and test different bits of hardware (EEPROM, clock chip, A/D, D/A, PHY)
+void delay(uint32_t t) {
+	while(t-- != 0) asm("NOP");
+}
+
+int main(int argc, char *argv[]) {
+
+	hal_disable_ints();
+  hal_uart_init();
+	spi_init();
+
+	puts("Hardware testbed. Init clocks...");
+
+	clocks_init();
+
+	//now, hopefully, we should be running at 100MHz instead of 50MHz, meaning our UART is twice as fast and we're talking at 230400.
+
+	while(1) {
+		delay(500000);
+		puts("Eat at Joe's.");
+	}
+
+
+
+
+
+	return 0;
+}
diff --git a/firmware/microblaze/apps/txrx_uhd.c b/firmware/microblaze/apps/txrx_uhd.c
index 8cae95b3a..faf9bedfc 100644
--- a/firmware/microblaze/apps/txrx_uhd.c
+++ b/firmware/microblaze/apps/txrx_uhd.c
@@ -42,9 +42,11 @@
 #include <string.h>
 #include "clocks.h"
 #include "usrp2/fw_common.h"
+#include <i2c_async.h>
 #include <i2c.h>
 #include <ethertype.h>
 #include <arp_cache.h>
+#include "udp_fw_update.h"
 
 /*
  * Full duplex Tx and Rx between ethernet and DSP pipelines
@@ -346,6 +348,28 @@ void handle_udp_ctrl_packet(
         send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
         break;
 
+    case USRP2_CTRL_ID_SO_LIKE_CAN_YOU_READ_THIS_UART_BRO:{
+      //executes a readline()-style read, up to num_bytes long, up to and including newline
+      int num_bytes = ctrl_data_in->data.uart_args.bytes;
+      if(num_bytes > 20) num_bytes = 20;
+      num_bytes = fngets_timeout(ctrl_data_in->data.uart_args.dev, (char *) ctrl_data_out.data.uart_args.data, num_bytes);
+      ctrl_data_out.id = USRP2_CTRL_ID_I_HELLA_READ_THAT_UART_DUDE;
+      ctrl_data_out.data.uart_args.bytes = num_bytes;
+      break;
+    }
+
+    case USRP2_CTRL_ID_HEY_WRITE_THIS_UART_FOR_ME_BRO:{
+      int num_bytes = ctrl_data_in->data.uart_args.bytes;
+      if(num_bytes > 20) num_bytes = 20;
+      //before we write to the UART, we flush the receive buffer
+      //this assumes that we're interested in the reply
+      hal_uart_rx_flush(ctrl_data_in->data.uart_args.dev);
+      fnputstr(ctrl_data_in->data.uart_args.dev, (char *) ctrl_data_in->data.uart_args.data, num_bytes);
+      ctrl_data_out.id = USRP2_CTRL_ID_MAN_I_TOTALLY_WROTE_THAT_UART_DUDE;
+      ctrl_data_out.data.uart_args.bytes = num_bytes;
+      break;
+    }
+
     default:
         ctrl_data_out.id = USRP2_CTRL_ID_HUH_WHAT;
         send_udp_pkt(USRP2_UDP_CTRL_PORT, src, &ctrl_data_out, sizeof(ctrl_data_out));
@@ -487,6 +511,7 @@ main(void)
   //2) register callbacks for udp ports we service
   register_udp_listener(USRP2_UDP_CTRL_PORT, handle_udp_ctrl_packet);
   register_udp_listener(USRP2_UDP_DATA_PORT, handle_udp_data_packet);
+  register_udp_listener(USRP2_UDP_UPDATE_PORT, handle_udp_fw_update_packet);
 
   //3) setup ethernet hardware to bring the link up
   ethernet_register_link_changed_callback(link_changed_callback);
diff --git a/firmware/microblaze/apps/uart_flash_loader.c b/firmware/microblaze/apps/uart_flash_loader.c
new file mode 100644
index 000000000..d67b84677
--- /dev/null
+++ b/firmware/microblaze/apps/uart_flash_loader.c
@@ -0,0 +1,169 @@
+/* -*- c++ -*- */
+/*
+ * Copyright 2010 Ettus Research LLC
+ *
+ */
+
+//#include <stdio.h>
+#include <stdlib.h>
+#include <memory_map.h>
+#include <nonstdio.h>
+#include <hal_io.h>
+#include <hal_uart.h>
+#include <xilinx_s3_icap.h>
+#include <spi_flash.h>
+#include <spi_flash_private.h>
+//#include <clocks.h>
+#include <ihex.h>
+#include <bootloader_utils.h>
+
+//uses UART to load files to Flash in Intel HEX 16-bit format.
+//this is one example of a "safe" firmware image to be loaded by a bootloader into main RAM.
+//this CANNOT write to main RAM, since it is resident there.
+
+//Sector 0-31: Safe FPGA bootloader image
+//Sector 32-63: Production bootloader image
+//Sector 64: Production firmware image
+//Sector 127: Safe firmware image
+
+
+void uart_flash_loader(void) {
+
+	char buf[256]; //input data buffer
+	uint8_t ihx[32]; //ihex data buffer
+	uint32_t slot_offset = PROD_FW_IMAGE_LOCATION_ADDR; //initial slot offset to program to.
+	uint32_t extended_addr = 0x00000000; //extended Intel hex segment address
+
+	size_t sector_size = spi_flash_log2_sector_size();
+	ihex_record_t ihex_record;
+	ihex_record.data = ihx;
+	int i;
+
+
+	//not gonna win a turing prize for my C text parsing
+	while(1) {
+		gets(buf);
+		if(!strncmp(buf, "!SECTORSIZE", 7)) { //return the sector size in log format
+			putstr("OK ");
+			puthex8((uint32_t) sector_size); //err, this should probably be decimal for human readability. we do have itoa now...
+			putstr("\n");
+		}
+		else if(!strncmp(buf, "!SETADDR", 7)) { //set start address for programming
+			slot_offset = atol(&buf[8]);
+			puts("OK");
+//			puthex32(slot_offset);
+//			putstr("\n");
+		}
+		else if(!strncmp(buf, "!ERASE", 6)) { //erase a sector
+			uint32_t sector = atol(&buf[6]);
+			uint32_t size = 2 << (sector_size-1);
+			uint32_t addr = sector << sector_size;
+
+			spi_flash_erase(addr, size); //we DO NOT implement write protection here. it is up to the HOST PROGRAM to not issue an ERASE unless it means it.
+																	 //unfortunately the Flash cannot write-protect the segments that really matter, so we only use global write-protect
+																	 //as a means of avoiding accidental writes from runaway code / garbage on the SPI bus.
+			puts("OK");
+		}
+//can't exactly run firmware if you're already executing out of main RAM
+/*		else if(!strncmp(buf, "!RUNSFW", 7)) {
+			if(is_valid_fw_image(SAFE_FW_IMAGE_LOCATION_ADDR)) {
+				puts("OK");
+				spi_flash_read(SAFE_FW_IMAGE_LOCATION_ADDR, FW_IMAGE_SIZE_BYTES, (void *)RAM_BASE);
+				start_program(RAM_BASE);
+			} else {
+				puts("NOK");
+			}
+		}
+		else if(!strncmp(buf, "!RUNPFW", 7)) {
+			if(is_valid_fw_image(PROD_FW_IMAGE_LOCATION_ADDR)) {
+				puts("OK");
+				spi_flash_read(PROD_FW_IMAGE_LOCATION_ADDR, FW_IMAGE_SIZE_BYTES-1, (void *)RAM_BASE);
+				start_program(RAM_BASE);
+			} else {
+				puts("NOK");
+			}
+		}
+*/
+		else if(!strncmp(buf, "!RUNPFPGA", 8)) {
+			if(is_valid_fpga_image(PROD_FPGA_IMAGE_LOCATION_ADDR)) {
+				puts("OK");
+				//icap_reload_fpga(PROD_FPGA_IMAGE_LOCATION_ADDR);
+			} else {
+				puts("NOK");
+			}				
+		}
+		else if(!strncmp(buf, "!RUNSFPGA", 8)) {
+			if(is_valid_fpga_image(SAFE_FPGA_IMAGE_LOCATION_ADDR)) {
+				puts("OK");
+				//icap_reload_fpga(SAFE_FPGA_IMAGE_LOCATION_ADDR);
+			} else {
+				puts("NOK");
+			}
+		}
+		else if(!strncmp(buf, "!READ", 5)) {
+			uint32_t addr = atol(&buf[5]);
+			spi_flash_read(addr, 16, ihx);
+			for(i=0; i < 16; i++) {
+				puthex8(ihx[i]);
+			}
+			putstr("\n");
+		}
+
+		else if(!ihex_parse(buf, &ihex_record)) { //last, try to see if the input was a valid IHEX line
+			switch (ihex_record.type) {
+				case 0:
+					spi_flash_program(ihex_record.addr + slot_offset + extended_addr, ihex_record.length, ihex_record.data);
+					puts("OK");
+					break;
+				case 1:
+					//here we would expect a CRC checking or something else to take place. for now we do nothing.
+					//well, we set the extended segment addr back to 0
+					extended_addr = 0;
+					puts("DONE");
+					break;
+				case 4:
+					//set the upper 16 bits of the address
+					extended_addr = ((ihex_record.data[0] << 8) + ihex_record.data[1]) << 16;
+					puts("OK");
+					break;
+				default:
+					puts("NOK");
+			}
+		}
+		else puts("NOK");
+	} //while(1)
+}
+
+void delay(uint32_t t) {
+	while(t-- != 0) asm("NOP");
+}
+
+int main(int argc, char *argv[]) {
+	uint8_t buf[32];
+	int i = 0;
+
+  hal_disable_ints();	// In case we got here via jmp 0x0
+
+//	delay(10000000);
+
+	//before anything else you might want to blinkenlights just to indicate code startup to the user.
+
+  hal_uart_init();
+	spif_init();
+//	i2c_init(); //for EEPROM
+	puts("USRP2+ UART firmware loader");
+
+//	puts("Debug: loading production image, 10 bytes.");
+
+//	spi_flash_read(PROD_FW_IMAGE_LOCATION_ADDR, 10, buf);
+//	for(i=0; i < 10; i++) {
+//		puthex8(buf[i]);
+//	}
+
+	uart_flash_loader();
+
+ 	//shouldn't get here. should reboot.
+	puts("shit happened.\n");
+
+	return 0;
+}