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authorBen Hilburn <ben.hilburn@ettus.com>2014-04-07 14:58:25 -0700
committerBen Hilburn <ben.hilburn@ettus.com>2014-04-07 14:58:25 -0700
commit642f3fb5823f292ae29cc38c8897327dfbdc3c15 (patch)
tree3211fe57cbd3d7ee15069dc741f4a65a59b2bb00 /firmware/fx3/b200/b200_vrq.h
parent937eae5f4831e16993a2f51e9c8e548fd74a3f13 (diff)
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b2xx: Pulling FX3 and AD9361 source code into master.
Diffstat (limited to 'firmware/fx3/b200/b200_vrq.h')
-rw-r--r--firmware/fx3/b200/b200_vrq.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/firmware/fx3/b200/b200_vrq.h b/firmware/fx3/b200/b200_vrq.h
new file mode 100644
index 000000000..d1f79f0ad
--- /dev/null
+++ b/firmware/fx3/b200/b200_vrq.h
@@ -0,0 +1,21 @@
+//
+// Copyright 2013-2014 Ettus Research LLC
+//
+
+/* This file defines b200 vendor requests handlers, version 1
+ */
+#ifndef B200_VRQ_H
+#define B200_VRQ_H
+
+uint32_t ad9361_transact_spi(const uint32_t bits);
+
+// note: for a write instruction bit 7 from byte 0 is set to 1
+#define MAKE_AD9361_WRITE(dest, reg, val) {dest[0] = 0x80 | ((reg >> 8) & 0x3F); \
+ dest[1] = reg & 0xFF; \
+ dest[2] = val;}
+#define MAKE_AD9361_READ(dest, reg) {dest[0] = (reg >> 8) & 0x3F; \
+ dest[1] = reg & 0xFF;}
+
+#endif //B200_VRQ_H
+
+