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author | Josh Blum <josh@joshknows.com> | 2011-06-14 17:15:38 -0700 |
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committer | Josh Blum <josh@joshknows.com> | 2011-06-14 17:56:54 -0700 |
commit | deae10bc1c85726ed7c206abca37a869c6f77cea (patch) | |
tree | 1bd8f8dc2734af460d8434e508d33ecdb9cf5fe7 /firmware/fx2/common/fx2regs.h | |
parent | 2d8d1a4d1ad15482e25f52e1fa3ad8ae94490a8e (diff) | |
download | uhd-deae10bc1c85726ed7c206abca37a869c6f77cea.tar.gz uhd-deae10bc1c85726ed7c206abca37a869c6f77cea.tar.bz2 uhd-deae10bc1c85726ed7c206abca37a869c6f77cea.zip |
b100: added b100 firmware (squashed)
Diffstat (limited to 'firmware/fx2/common/fx2regs.h')
-rw-r--r-- | firmware/fx2/common/fx2regs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/firmware/fx2/common/fx2regs.h b/firmware/fx2/common/fx2regs.h index 2f210f567..aa44791d0 100644 --- a/firmware/fx2/common/fx2regs.h +++ b/firmware/fx2/common/fx2regs.h @@ -664,6 +664,10 @@ sfr at 0xF8 EIP; // EIP Bit Values differ from Reg320 // must be zero bmBIT1 #define bmWORDWIDE bmBIT0 +/* EP 24 FIFO Flag bits (EP24FIFOFLGS) */ +#define EP2FIFOEMPTY bmBIT1 +#define EP4FIFOEMPTY bmBIT5 + /* * Chip Revision Control Bits (REVCTL) - used to ebable/disable revision specific features */ |