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authorNick Foster <nick@ettus.com>2012-01-12 11:03:43 -0800
committerJosh Blum <josh@joshknows.com>2012-02-01 10:04:53 -0800
commit081714b4ce40701067e5513127dd9b9322cbfa5d (patch)
treec5569358b623e1abfe2222b0fe2473aec0506c5d /firmware/fx2/common/fx2regs.h
parent81b4689cf5a16b71c85b4a0f94746d61091fa29f (diff)
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B100 firmware changes to allow slave mode TX/RX.
Diffstat (limited to 'firmware/fx2/common/fx2regs.h')
-rw-r--r--firmware/fx2/common/fx2regs.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/firmware/fx2/common/fx2regs.h b/firmware/fx2/common/fx2regs.h
index aa44791d0..acbc0b89e 100644
--- a/firmware/fx2/common/fx2regs.h
+++ b/firmware/fx2/common/fx2regs.h
@@ -91,7 +91,6 @@ EXTERN xdata _AT_(0xE60A) volatile BYTE REVID ; // Chip Revision
EXTERN xdata _AT_(0xE60B) volatile BYTE REVCTL ; // Chip Revision Control
// Endpoint Configuration
-
EXTERN xdata _AT_(0xE610) volatile BYTE EP1OUTCFG ; // Endpoint 1-OUT Configuration
EXTERN xdata _AT_(0xE611) volatile BYTE EP1INCFG ; // Endpoint 1-IN Configuration
EXTERN xdata _AT_(0xE612) volatile BYTE EP2CFG ; // Endpoint 2 Configuration
@@ -654,6 +653,22 @@ sfr at 0xF8 EIP; // EIP Bit Values differ from Reg320
#define bmIFCFG0 bmBIT0
#define bmIFCFGMASK (bmIFCFG0 | bmIFCFG1)
#define bmIFGPIF bmIFCFG1
+#define bmIFSLAVE (bmIFCFG0 | bmIFCFG1)
+
+/* Slave FIFO pin flags configuration bits (PINFLAGS) */
+#define bmINDEXED 0x0 //which fifo selected by FIFOADR
+#define bmEP2PF 0x4
+#define bmEP4PF 0x5
+#define bmEP6PF 0x6
+#define bmEP8PF 0x7
+#define bmEP2EF 0x8
+#define bmEP4EF 0x9
+#define bmEP6EF 0xA
+#define bmEP8EF 0xB
+#define bmEP2FF 0xC
+#define bmEP4FF 0xD
+#define bmEP6FF 0xE
+#define bmEP8FF 0xF
/* EP 2468 FIFO Configuration bits (EP2FIFOCFG,EP4FIFOCFG,EP6FIFOCFG,EP8FIFOCFG) */
#define bmINFM bmBIT6