made FX2 EEPROMS and firmware build with modern SDCC 3.6

8 files changed, 26 insertions, 26 deletions

diff --git a/firmware/fx2/b100/board_specific.c b/firmware/fx2/b100/board_specific.c
index 993d925b3..c85268cd1 100644
--- a/firmware/fx2/b100/board_specific.c
+++ b/firmware/fx2/b100/board_specific.c
@@ -58,7 +58,7 @@ set_sleep_bits (unsigned char bits, unsigned char mask)
   // NOP on usrp1
 }
 
-static xdata unsigned char xbuf[1];
+static __xdata unsigned char xbuf[1];
 
 void
 init_board (void)
diff --git a/firmware/fx2/b100/eeprom_io.c b/firmware/fx2/b100/eeprom_io.c
index 9eeb53636..666f3f692 100644
--- a/firmware/fx2/b100/eeprom_io.c
+++ b/firmware/fx2/b100/eeprom_io.c
@@ -27,12 +27,12 @@
 // returns non-zero if successful, else 0
 unsigned char
 eeprom_read (unsigned char i2c_addr, unsigned char eeprom_offset,
-	     xdata unsigned char *buf, unsigned char len)
+	     __xdata unsigned char *buf, unsigned char len)
 {
   // We setup a random read by first doing a "zero byte write".
   // Writes carry an address.  Reads use an implicit address.
 
-  static xdata unsigned char cmd[1];
+  static __xdata unsigned char cmd[1];
   cmd[0] = eeprom_offset;
   if (!i2c_write(i2c_addr, cmd, 1))
     return 0;
@@ -46,9 +46,9 @@ eeprom_read (unsigned char i2c_addr, unsigned char eeprom_offset,
 // returns non-zero if successful, else 0
 unsigned char
 eeprom_write (unsigned char i2c_addr, unsigned char eeprom_offset,
-	      const xdata unsigned char *buf, unsigned char len)
+	      const __xdata unsigned char *buf, unsigned char len)
 {
-  static xdata unsigned char cmd[2];
+  static __xdata unsigned char cmd[2];
   unsigned char ok;
 
   while (len-- > 0){
diff --git a/firmware/fx2/b100/eeprom_io.h b/firmware/fx2/b100/eeprom_io.h
index 558017b12..d1c4ee6ac 100644
--- a/firmware/fx2/b100/eeprom_io.h
+++ b/firmware/fx2/b100/eeprom_io.h
@@ -27,12 +27,12 @@
 // returns non-zero if successful, else 0
 unsigned char
 eeprom_read (unsigned char i2c_addr, unsigned char eeprom_offset,
-	     xdata unsigned char *buf, unsigned char len);
+	     __xdata unsigned char *buf, unsigned char len);
 
 // returns non-zero if successful, else 0
 unsigned char
 eeprom_write (unsigned char i2c_addr, unsigned char eeprom_offset,
-	      const xdata unsigned char *buf, unsigned char len);
+	      const __xdata unsigned char *buf, unsigned char len);
 
 
 #endif /* INCLUDED_EEPROM_IO_H */
diff --git a/firmware/fx2/b100/fpga_load.c b/firmware/fx2/b100/fpga_load.c
index 394c9f50e..6604de288 100644
--- a/firmware/fx2/b100/fpga_load.c
+++ b/firmware/fx2/b100/fpga_load.c
@@ -82,9 +82,9 @@ clock_out_config_byte (unsigned char bits)
 #else
 
 static void 
-clock_out_config_byte (unsigned char bits) _naked
+clock_out_config_byte (unsigned char bits) __naked
 {
-    _asm
+    __asm
 	mov	a, dpl
 	
 	rlc	a
@@ -129,14 +129,14 @@ clock_out_config_byte (unsigned char bits) _naked
 	
 	ret	
 
-    _endasm;
+    __endasm;
 }
 
 #endif
 
 static void
 clock_out_bytes (unsigned char bytecount,
-		 unsigned char xdata *p)
+		 unsigned char __xdata *p)
 {
   while (bytecount-- > 0)
     clock_out_config_byte (*p++);
@@ -156,7 +156,7 @@ clock_out_bytes (unsigned char bytecount,
  *	ALTERA_NSTATUS = 1 (input)
  */
 unsigned char
-fpga_load_xfer (xdata unsigned char *p, unsigned char bytecount)
+fpga_load_xfer (__xdata unsigned char *p, unsigned char bytecount)
 {
   clock_out_bytes (bytecount, p);
   return 1;
diff --git a/firmware/fx2/b100/fpga_rev2.c b/firmware/fx2/b100/fpga_rev2.c
index 326a01732..6ceccabd7 100644
--- a/firmware/fx2/b100/fpga_rev2.c
+++ b/firmware/fx2/b100/fpga_rev2.c
@@ -29,13 +29,13 @@ unsigned char g_tx_reset = 0;
 unsigned char g_rx_reset = 0;
 
 void
-fpga_write_reg (unsigned char regno, const xdata unsigned char *regval)
+fpga_write_reg (unsigned char regno, const __xdata unsigned char *regval)
 {
 	//nop
 }
 
 
-static xdata unsigned char regval[4] = {0, 0, 0, 0};
+static __xdata unsigned char regval[4] = {0, 0, 0, 0};
 
 // Resets both AD9862's and the FPGA serial bus interface.
 
diff --git a/firmware/fx2/b100/gpif.c b/firmware/fx2/b100/gpif.c
index b499e4fcf..0cba31919 100644
--- a/firmware/fx2/b100/gpif.c
+++ b/firmware/fx2/b100/gpif.c
@@ -156,7 +156,7 @@
 // END DO NOT EDIT                            

                                               

 // DO NOT EDIT ...                     

-const char xdata WaveData[128] =     

+const char __xdata WaveData[128] =     

 {                                      

 // Wave 0 

 /* LenBr */ 0x01,     0x01,     0x01,     0x01,     0x01,     0x01,     0x01,     0x07,

@@ -182,7 +182,7 @@ const char xdata WaveData[128] =
 // END DO NOT EDIT     

                        

 // DO NOT EDIT ...                     

-const char xdata FlowStates[36] =   

+const char __xdata FlowStates[36] =   

 {                                      

 /* Wave 0 FlowStates */ 0x81,0x2D,0x0E,0x00,0x00,0x04,0x03,0x02,0x00,

 /* Wave 1 FlowStates */ 0x81,0x2D,0x09,0x00,0x00,0x04,0x03,0x02,0x00,

@@ -192,7 +192,7 @@ const char xdata FlowStates[36] =
 // END DO NOT EDIT     

                        

 // DO NOT EDIT ...                                               

-const char xdata InitData[7] =                                   

+const char __xdata InitData[7] =                                   

 {                                                                

 /* Regs  */ 0xA0,0x00,0x00,0x00,0xEE,0x4E,0x00     

 };                                                               

diff --git a/firmware/fx2/b100/usrp_main.c b/firmware/fx2/b100/usrp_main.c
index f79d3d111..c5f481785 100644
--- a/firmware/fx2/b100/usrp_main.c
+++ b/firmware/fx2/b100/usrp_main.c
@@ -54,14 +54,14 @@ unsigned char g_tx_enable = 0;
 unsigned char g_rx_enable = 0;
 unsigned char g_rx_overrun = 0;
 unsigned char g_tx_underrun = 0;
-bit enable_gpif = 0;
+__bit enable_gpif = 0;
 
 /*
  * the host side fpga loader code pushes an MD5 hash of the bitstream
  * into hash1.
  */
 #define	  USRP_HASH_SIZE      16
-xdata at USRP_HASH_SLOT_1_ADDR unsigned char hash1[USRP_HASH_SIZE];
+__xdata __at (USRP_HASH_SLOT_1_ADDR) unsigned char hash1[USRP_HASH_SIZE];
 
 //void clear_fpga_data_fifo(void);
 
@@ -220,7 +220,7 @@ main_loop (void)
  * Toggle led 0
  */
 void
-isr_tick (void) interrupt
+isr_tick (void) __interrupt
 {
   static unsigned char	count = 1;
   
@@ -239,8 +239,8 @@ isr_tick (void) interrupt
 void
 patch_usb_descriptors(void)
 {
-  static xdata unsigned char hw_rev;
-  static xdata unsigned char serial_no[SERIAL_NO_LEN];
+  static __xdata unsigned char hw_rev;
+  static __xdata unsigned char serial_no[SERIAL_NO_LEN];
   unsigned char i;
 
   eeprom_read(I2C_ADDR_BOOT, HW_REV_OFFSET, &hw_rev, 1);	// LSB of device id
diff --git a/firmware/fx2/b100/usrp_regs.h b/firmware/fx2/b100/usrp_regs.h
index 3d65337f5..6456f09c8 100644
--- a/firmware/fx2/b100/usrp_regs.h
+++ b/firmware/fx2/b100/usrp_regs.h
@@ -59,11 +59,11 @@
 #define PORT_A_ADDR 0x80
 #define PORT_C_ADDR 0xA0
 
-sbit at PORT_A_ADDR+0 bitALTERA_DCLK;	// 0x80 is the bit address of PORT A
-sbit at PORT_A_ADDR+1 bitALTERA_NCONFIG;
-sbit at PORT_A_ADDR+3 bitALTERA_DATA0;
+__sbit __at (PORT_A_ADDR+0) bitALTERA_DCLK;	// 0x80 is the bit address of PORT A
+__sbit __at (PORT_A_ADDR+1) bitALTERA_NCONFIG;
+__sbit __at (PORT_A_ADDR+3) bitALTERA_DATA0;
 
-sbit at PORT_C_ADDR+7 bitALTERA_CONF_DONE;
+__sbit __at (PORT_C_ADDR+7) bitALTERA_CONF_DONE;
 
 
 /* Port B: GPIF	FD[7:0]			*/