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| author | Marcus Müller <marcus.mueller@ettus.com> | 2017-01-16 15:54:57 +0100 |
|---|---|---|
| committer | Martin Braun <martin.braun@ettus.com> | 2017-06-29 15:53:15 -0700 |
| commit | d9bcf00f69313b6dd42346d6af340a1a9874ba9f (patch) | |
| tree | 62185d7ea2c20952d60cf8f6a558866ecf1d54bf /firmware/fx2/b100/fpga_rev2.c | |
| parent | c77bd0c46a598d5e69b179d76a3df6091e982129 (diff) | |
| download | uhd-d9bcf00f69313b6dd42346d6af340a1a9874ba9f.tar.gz uhd-d9bcf00f69313b6dd42346d6af340a1a9874ba9f.tar.bz2 uhd-d9bcf00f69313b6dd42346d6af340a1a9874ba9f.zip | |
made FX2 EEPROMS and firmware build with modern SDCC 3.6
Diffstat (limited to 'firmware/fx2/b100/fpga_rev2.c')
| -rw-r--r-- | firmware/fx2/b100/fpga_rev2.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/fx2/b100/fpga_rev2.c b/firmware/fx2/b100/fpga_rev2.c index 326a01732..6ceccabd7 100644 --- a/firmware/fx2/b100/fpga_rev2.c +++ b/firmware/fx2/b100/fpga_rev2.c @@ -29,13 +29,13 @@ unsigned char g_tx_reset = 0; unsigned char g_rx_reset = 0; void -fpga_write_reg (unsigned char regno, const xdata unsigned char *regval) +fpga_write_reg (unsigned char regno, const __xdata unsigned char *regval) { //nop } -static xdata unsigned char regval[4] = {0, 0, 0, 0}; +static __xdata unsigned char regval[4] = {0, 0, 0, 0}; // Resets both AD9862's and the FPGA serial bus interface. |