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| author | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-09-08 01:00:12 +0000 |
|---|---|---|
| committer | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-09-08 01:00:12 +0000 |
| commit | 61f2f0214c5999ea42a368a4fc99f03d8eb28d1e (patch) | |
| tree | e7e24a9adc05ff1422fe3ada9926a51634741b47 /eth/bench/verilog/mdio.scr | |
| download | uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.tar.gz uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.tar.bz2 uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.zip | |
Merged r9433:9527 from features/gr-usrp2 into trunk. Adds usrp2 and gr-usrp2 top-level components. Trunk passes distcheck with mb-gcc installed, but currently not without them. The key issue is that when mb-gcc is not installed, the build system skips over the usrp2/firmware directory, and the firmware include files don't get put into the dist tarball. But we can't do the usual DIST_SUBDIRS method as the firmware is a subpackage.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9528 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'eth/bench/verilog/mdio.scr')
| -rw-r--r-- | eth/bench/verilog/mdio.scr | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/eth/bench/verilog/mdio.scr b/eth/bench/verilog/mdio.scr new file mode 100644 index 000000000..8ad9969b9 --- /dev/null +++ b/eth/bench/verilog/mdio.scr @@ -0,0 +1,52 @@ +// Read from register 24 to confirm that Rx CRC check is enabled
+03 00 18 00 01 ff ff
+
+// Set speed to 1000 Mbps
+01 00 22 00 04
+
+// Set MDIO clock (MDC) divider to 4 to speed up test
+01 00 23 00 04
+03 00 23 00 04 ff ff
+
+// Check default (reset) values in new (added) MDIO registers
+//03 00 23 00 64 ff ff
+03 00 24 00 00 ff ff
+03 00 25 00 00 ff ff
+03 00 26 00 00 ff ff
+03 00 27 00 00 ff ff
+03 00 28 00 00 ff ff
+
+// Set RGAD=0x00 (all zeroes), FIAD=0x1f (all ones), check it
+// - these values allows easy recognition in the waveform
+01 00 25 00 1f
+03 00 25 00 1f ff ff
+
+// Now start the read operation by writing a 1 to the MIICOMMAND[1] - RSTAT
+01 00 24 00 02
+03 00 24 00 02 ff ff
+
+// Delay for 768 NOP
+0F 03 00
+
+// Check that the read operation has completed
+03 00 28 00 00 ff ff
+
+// Set RGAD=0x1f (all ones), FIAD=0x00 (all zeroes), check it
+// - these values allows easy recognition in the waveform
+01 00 25 1f 00
+03 00 25 1f 00 ff ff
+// Set MIITX_DATA = 0xAAAA, check it
+01 00 26 AA AA
+03 00 26 AA AA ff ff
+// Check MIISTATUS - must still be zero
+03 00 28 00 00 ff ff
+
+// Now start the write operation by writing a 1 to the MIICOMMAND[2] - WCTRLDATA
+01 00 24 00 04
+03 00 24 00 04 ff ff
+
+// Delay for 768 NOP
+0F 03 00
+
+// Check that the write operation has completed
+03 00 28 00 00 ff ff
|