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authorjcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5>2008-09-08 01:00:12 +0000
committerjcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5>2008-09-08 01:00:12 +0000
commit61f2f0214c5999ea42a368a4fc99f03d8eb28d1e (patch)
treee7e24a9adc05ff1422fe3ada9926a51634741b47 /control_lib/sd_spi.v
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Merged r9433:9527 from features/gr-usrp2 into trunk. Adds usrp2 and gr-usrp2 top-level components. Trunk passes distcheck with mb-gcc installed, but currently not without them. The key issue is that when mb-gcc is not installed, the build system skips over the usrp2/firmware directory, and the firmware include files don't get put into the dist tarball. But we can't do the usual DIST_SUBDIRS method as the firmware is a subpackage.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9528 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'control_lib/sd_spi.v')
-rw-r--r--control_lib/sd_spi.v70
1 files changed, 70 insertions, 0 deletions
diff --git a/control_lib/sd_spi.v b/control_lib/sd_spi.v
new file mode 100644
index 000000000..3f4d7f46a
--- /dev/null
+++ b/control_lib/sd_spi.v
@@ -0,0 +1,70 @@
+module sd_spi
+ (input clk,
+ input rst,
+
+ // SD Card interface
+ output reg sd_clk,
+ output sd_mosi,
+ input sd_miso,
+
+ // Controls
+ input [7:0] clk_div,
+ input [7:0] send_dat,
+ output [7:0] rcv_dat,
+ input go,
+ output ready);
+
+ reg [7:0] clk_ctr;
+ reg [3:0] bit_ctr;
+
+ wire bit_ready = (clk_ctr == 8'd0);
+ wire bit_busy = (clk_ctr != 8'd0);
+ wire bit_done = (clk_ctr == clk_div);
+
+ wire send_clk_hi = (clk_ctr == (clk_div>>1));
+ wire latch_dat = (clk_ctr == (clk_div - 8'd2));
+ wire send_clk_lo = (clk_ctr == (clk_div - 8'd1));
+
+ wire send_bit = (bit_ready && (bit_ctr != 0));
+ assign ready = (bit_ctr == 0);
+
+ always @(posedge clk)
+ if(rst)
+ clk_ctr <= 0;
+ else if(bit_done)
+ clk_ctr <= 0;
+ else if(bit_busy)
+ clk_ctr <= clk_ctr + 1;
+ else if(send_bit)
+ clk_ctr <= 1;
+
+ always @(posedge clk)
+ if(rst)
+ sd_clk <= 0;
+ else if(send_clk_hi)
+ sd_clk <= 1;
+ else if(send_clk_lo)
+ sd_clk <= 0;
+
+ always @(posedge clk)
+ if(rst)
+ bit_ctr <= 0;
+ else if(bit_done)
+ if(bit_ctr == 4'd8)
+ bit_ctr <= 0;
+ else
+ bit_ctr <= bit_ctr + 1;
+ else if(bit_ready & go)
+ bit_ctr <= 1;
+
+ reg [7:0] shift_reg;
+ always @(posedge clk)
+ if(go)
+ shift_reg <= send_dat;
+ else if(latch_dat)
+ shift_reg <= {shift_reg[6:0],sd_miso};
+
+ assign sd_mosi = shift_reg[7];
+ assign rcv_dat = shift_reg;
+
+endmodule // sd_spi