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author | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-09-08 01:00:12 +0000 |
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committer | jcorgan <jcorgan@221aa14e-8319-0410-a670-987f0aec2ac5> | 2008-09-08 01:00:12 +0000 |
commit | 61f2f0214c5999ea42a368a4fc99f03d8eb28d1e (patch) | |
tree | e7e24a9adc05ff1422fe3ada9926a51634741b47 /control_lib/oneshot_2clk.v | |
download | uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.tar.gz uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.tar.bz2 uhd-61f2f0214c5999ea42a368a4fc99f03d8eb28d1e.zip |
Merged r9433:9527 from features/gr-usrp2 into trunk. Adds usrp2 and gr-usrp2 top-level components. Trunk passes distcheck with mb-gcc installed, but currently not without them. The key issue is that when mb-gcc is not installed, the build system skips over the usrp2/firmware directory, and the firmware include files don't get put into the dist tarball. But we can't do the usual DIST_SUBDIRS method as the firmware is a subpackage.
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@9528 221aa14e-8319-0410-a670-987f0aec2ac5
Diffstat (limited to 'control_lib/oneshot_2clk.v')
-rw-r--r-- | control_lib/oneshot_2clk.v | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/control_lib/oneshot_2clk.v b/control_lib/oneshot_2clk.v new file mode 100644 index 000000000..72f16a4b3 --- /dev/null +++ b/control_lib/oneshot_2clk.v @@ -0,0 +1,35 @@ + +// Retime a single bit from one clock domain to another +// Guarantees that no matter what the relative clock rates, if the in signal is high for at least +// one clock cycle in the clk_in domain, then the out signal will be high for at least one +// clock cycle in the clk_out domain. If the in signal goes high again before the process is done +// the behavior is undefined. No other guarantees. Designed for passing reset into a new +// clock domain. + +module oneshot_2clk + (input clk_in, + input in, + input clk_out, + output reg out); + + reg del_in = 0; + reg sendit = 0, gotit = 0; + reg sendit_d = 0, gotit_d = 0; + + always @(posedge clk_in) del_in <= in; + + always @(posedge clk_in) + if(in & ~del_in) // we have a positive edge + sendit <= 1; + else if(gotit) + sendit <= 0; + + always @(posedge clk_out) sendit_d <= sendit; + always @(posedge clk_out) out <= sendit_d; + + always @(posedge clk_in) gotit_d <= out; + always @(posedge clk_in) gotit <= gotit_d; + +endmodule // oneshot_2clk + + |