diff options
author | Josh Blum <josh@joshknows.com> | 2010-01-22 11:56:55 -0800 |
---|---|---|
committer | Josh Blum <josh@joshknows.com> | 2010-01-22 11:56:55 -0800 |
commit | 7bf8a6df381a667134b55701993c6770d32bc76b (patch) | |
tree | 4a298fb5450f7277b5aaf5210740ae18f818c9aa /control_lib/gray_send.v | |
parent | 8f2c33eab9396185df259639082b7d1618585973 (diff) | |
download | uhd-7bf8a6df381a667134b55701993c6770d32bc76b.tar.gz uhd-7bf8a6df381a667134b55701993c6770d32bc76b.tar.bz2 uhd-7bf8a6df381a667134b55701993c6770d32bc76b.zip |
Moved usrp2 fpga files into usrp2 subdir.
Diffstat (limited to 'control_lib/gray_send.v')
-rw-r--r-- | control_lib/gray_send.v | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/control_lib/gray_send.v b/control_lib/gray_send.v deleted file mode 100644 index 7fc07d40c..000000000 --- a/control_lib/gray_send.v +++ /dev/null @@ -1,29 +0,0 @@ - - - -module gray_send - #(parameter WIDTH = 8) - (input clk_in, input [WIDTH-1:0] addr_in, - input clk_out, output reg [WIDTH-1:0] addr_out); - - reg [WIDTH-1:0] gray_clkin, gray_clkout, gray_clkout_d1; - wire [WIDTH-1:0] gray, bin; - - bin2gray #(.WIDTH(WIDTH)) b2g (.bin(addr_in), .gray(gray) ); - - always @(posedge clk_in) - gray_clkin <= gray; - - always @(posedge clk_out) - gray_clkout <= gray_clkin; - - always @(posedge clk_out) - gray_clkout_d1 <= gray_clkout; - - gray2bin #(.WIDTH(WIDTH)) g2b (.gray(gray_clkout_d1), .bin(bin) ); - - // FIXME we may not need the next register, but it may help timing - always @(posedge clk_out) - addr_out <= bin; - -endmodule // gray_send |