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authorMartin Braun <martin.braun@ettus.com>2014-08-18 23:36:02 +0200
committerMartin Braun <martin.braun@ettus.com>2014-08-18 23:36:02 +0200
commita38fee789d66b87b9e25edcfcf47247fe11f8371 (patch)
tree04ff644e70bf3c6d5b5b436573f7ed47eb820bab /CHANGELOG
parent9bf965c804022e876c4ca5382db4849257c6222d (diff)
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Updated CHANGELOG for 3.7.2rc2
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@@ -2,6 +2,9 @@ Change Log for Releases
==============================
## 003.007.002
+* Fixed X300 phase alignment issues
+* Fixed CMake 2.6 incompatibility issues
+* EEPROM burner improvements
* Properly flushing PCIe chain on device to prevent stale data.
* Adjusted bus clock rate in FPGA to improve timing.
* Fixed issue where FPGA would fail to load FPGA image over PCIe.