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author | Michael West <michael.west@ettus.com> | 2013-11-01 16:29:44 -0700 |
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committer | Michael West <michael.west@ettus.com> | 2013-11-01 16:29:44 -0700 |
commit | 901434f58941985fe3e00d7dd53ff4538b542244 (patch) | |
tree | db690439739490874221c08b95e95870e1f51466 | |
parent | 709db30d12a664b23b7f3695433a7b2d45c2a533 (diff) | |
download | uhd-901434f58941985fe3e00d7dd53ff4538b542244.tar.gz uhd-901434f58941985fe3e00d7dd53ff4538b542244.tar.bz2 uhd-901434f58941985fe3e00d7dd53ff4538b542244.zip |
Readability improvements.
-rw-r--r-- | host/lib/usrp/usrp2/usrp2_clk_regs.hpp | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp index 45c0859d8..d5e506d8d 100644 --- a/host/lib/usrp/usrp2/usrp2_clk_regs.hpp +++ b/host/lib/usrp/usrp2/usrp2_clk_regs.hpp @@ -22,7 +22,16 @@ class usrp2_clk_regs_t { public: - usrp2_clk_regs_t(void):test(0),fpga(0),adc(0),dac(0),serdes(0),exp(0),tx_db(0),rx_db(0) { ; } + usrp2_clk_regs_t(void): + test(0), + fpga(0), + adc(0), + dac(0), + serdes(0), + exp(0), + tx_db(0), + rx_db(0) {} + usrp2_clk_regs_t(usrp2_iface::rev_type rev) { fpga = adc = serdes = exp = tx_db = 0; test = 0; |