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author | Matt Ettus <matt@ettus.com> | 2011-10-12 16:11:12 -0700 |
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committer | Matt Ettus <matt@ettus.com> | 2011-10-26 15:57:22 -0700 |
commit | 9ac4cb33c830c626311817fb43c210070f518d11 (patch) | |
tree | 3033f19fed1b019bc76f4f47a7a7c216712fa197 | |
parent | dd54bf0909025396986db2c045b0f1da2c4df657 (diff) | |
download | uhd-9ac4cb33c830c626311817fb43c210070f518d11.tar.gz uhd-9ac4cb33c830c626311817fb43c210070f518d11.tar.bz2 uhd-9ac4cb33c830c626311817fb43c210070f518d11.zip |
dsp_engine: don't use SD rounding in 8 bit mode, so we can have a flat noise floor.
-rw-r--r-- | usrp2/sdr_lib/dspengine_16to8.v | 4 | ||||
-rw-r--r-- | usrp2/sdr_lib/round_sd.v | 5 |
2 files changed, 5 insertions, 4 deletions
diff --git a/usrp2/sdr_lib/dspengine_16to8.v b/usrp2/sdr_lib/dspengine_16to8.v index 5f2a5e1a3..53c5d29da 100644 --- a/usrp2/sdr_lib/dspengine_16to8.v +++ b/usrp2/sdr_lib/dspengine_16to8.v @@ -208,14 +208,14 @@ module dspengine_16to8 (.P(prod_i), .A(scale_factor), .B({i16,2'b00}), .C(clk), .CE(stb_mult), .R(reset) ); clip_reg #(.bits_in(24),.bits_out(16),.STROBED(1)) clip_i (.clk(clk), .in(prod_i[35:12]), .out(scaled_i), .strobe_in(stb_clip), .strobe_out()); - round_sd #(.WIDTH_IN(16),.WIDTH_OUT(8)) round_i + round_sd #(.WIDTH_IN(16),.WIDTH_OUT(8),.DISABLE_SD(1)) round_i (.clk(clk), .reset(reset), .in(scaled_i), .strobe_in(stb_round), .out(i8), .strobe_out()); MULT18X18S mult_q (.P(prod_q), .A(scale_factor), .B({q16,2'b00}), .C(clk), .CE(stb_mult), .R(reset) ); clip_reg #(.bits_in(24),.bits_out(16),.STROBED(1)) clip_q (.clk(clk), .in(prod_q[35:12]), .out(scaled_q), .strobe_in(stb_clip), .strobe_out()); - round_sd #(.WIDTH_IN(16),.WIDTH_OUT(8)) round_q + round_sd #(.WIDTH_IN(16),.WIDTH_OUT(8),.DISABLE_SD(1)) round_q (.clk(clk), .reset(reset), .in(scaled_q), .strobe_in(stb_round), .out(q8), .strobe_out()); endmodule // dspengine_16to8 diff --git a/usrp2/sdr_lib/round_sd.v b/usrp2/sdr_lib/round_sd.v index aeeb3502f..94584f6ef 100644 --- a/usrp2/sdr_lib/round_sd.v +++ b/usrp2/sdr_lib/round_sd.v @@ -2,7 +2,8 @@ module round_sd #(parameter WIDTH_IN=18, - parameter WIDTH_OUT=16) + parameter WIDTH_OUT=16, + parameter DISABLE_SD=0) (input clk, input reset, input [WIDTH_IN-1:0] in, input strobe_in, output [WIDTH_OUT-1:0] out, output strobe_out); @@ -15,7 +16,7 @@ module round_sd sign_extend #(.bits_in(ERR_WIDTH),.bits_out(WIDTH_IN)) ext_err (.in(err), .out(err_ext)); add2_and_clip_reg #(.WIDTH(WIDTH_IN)) add2_and_clip_reg - (.clk(clk), .rst(reset), .in1(in), .in2(err_ext), .strobe_in(strobe_in), .sum(sum), .strobe_out(strobe_out)); + (.clk(clk), .rst(reset), .in1(in), .in2((DISABLE_SD == 0) ? err_ext : 0), .strobe_in(strobe_in), .sum(sum), .strobe_out(strobe_out)); round #(.bits_in(WIDTH_IN),.bits_out(WIDTH_OUT)) round_sum (.in(sum), .out(out), .err(err)); |