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author | Balint Seeber <balint@ettus.com> | 2013-11-19 18:41:27 -0800 |
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committer | Balint Seeber <balint@ettus.com> | 2013-11-19 18:41:27 -0800 |
commit | 58f4af976d64765c2402e1ce00ee78f4aae51881 (patch) | |
tree | ea3324800c51383b8e500188c2c3a43e0b34e21b | |
parent | f568b1984f77a525260b6a5157ce3a8f1ab56307 (diff) | |
download | uhd-58f4af976d64765c2402e1ce00ee78f4aae51881.tar.gz uhd-58f4af976d64765c2402e1ce00ee78f4aae51881.tar.bz2 uhd-58f4af976d64765c2402e1ce00ee78f4aae51881.zip |
b200: check return value from control write of FPGA bitstream for short transferrelease_003_006_000
-rw-r--r-- | host/lib/usrp/b200/b200_iface.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/host/lib/usrp/b200/b200_iface.cpp b/host/lib/usrp/b200/b200_iface.cpp index 959f77077..a8e96f4ac 100644 --- a/host/lib/usrp/b200/b200_iface.cpp +++ b/host/lib/usrp/b200/b200_iface.cpp @@ -569,6 +569,8 @@ public: int nwritten = fx3_control_write(B200_VREQ_FPGA_DATA, 0, 0, out_buff, transfer_count, 5000); if (nwritten <= 0) throw uhd::io_error("load_fpga: cannot write bitstream to FX3."); + else if (nwritten != transfer_count) + throw uhd::io_error("load_fpga: short write while transferring bitstream to FX3."); if (load_img_msg) { |